HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 691
HD6417760BP200QS
Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BP200QS
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 691 of 1418
- Download datasheet (9Mb)
Figure 17.8 shows a sample SCIF initialization flowchart.
MCE in SCFCR, and clear TFRST
Set RTRG1-0, TTRG1-0 bits, and
in SCSCR (leaving TE, RE, TIE,
SCSCR to 1, and set TIE, RIE,
Set CKE1 and CKE0 bits
and RIE bits cleared to 0)
Set TFRST and RFRST
Set data transfer format
Clear TE and RE bits in
1-bit interval elapsed?
Set TE and RE bits in
Set value in SCBRR
and RFRST bits to 0
Start of initialization
bits in SCFCR to 1
End of initialization
Figure 17.8 Sample SCIF Initialization Flowchart
and REIE bits
SCSCR to 0
in SCSMR
Yes
Wait
No
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Set the clock selection in SCSCR.
Be sure to clear bits TIE, RIE, TE,
and RE to 0.
Set the data transfer format in
SCSMR.
Write a value corresponding to the
bit rate into SCBRR. (Not
necessary if an external clock is
used.)
Wait at least one bit interval, then
set the TE bit or RE bit in SCSCR
to 1. Also set the RIE, REIE, and
TIE bits.
Setting the TE and RE bits enables
the SCIF_TXD and SCIF_RXD pins
to be used. When transmitting, the
SCIF will go to the mark state;
when receiving, it will go to the idle
state, waiting for a start bit.
Rev. 2.00 Feb. 12, 2010 Page 607 of 1330
REJ09B0554-0200
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