SAK-XC167CI-16F40F BB Infineon Technologies, SAK-XC167CI-16F40F BB Datasheet - Page 39

• Manufacturer Part Number: SAK-XC167CI-16F40F BB
• Description: IC MCU 16BIT 128KB TQFP-144-19
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAK-XC167CI-16F40F BB

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: ASC, I2C, SSC, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 8.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 128.0 KByte
• For Use With: B158-H8963-X-X-7600IN - KIT EASY XC167CIMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: KX167CI16F40FBBNP; KX167CI16F40FBBXP; SAKXC167CI16F40FBBT; SP000095455; SP000224695

3.7
The CAPCOM6 unit supports generation and control of timing sequences on up to three
16-bit capture/compare channels plus one independent 10-bit compare channel.
In compare mode the CAPCOM6 unit provides two output signals per channel which
have inverted polarity and non-overlapping pulse transitions (deadtime control). The
compare channel can generate a single PWM output signal and is further used to
modulate the capture/compare output signals.
In capture mode the contents of compare timer T12 is stored in the capture registers
upon a signal transition at pins CCx.
Compare timers T12 (16-bit) and T13 (10-bit) are free running timers which are clocked
by the prescaled system clock.
Figure 6
For motor control applications both subunits may generate versatile multichannel PWM
signals which are basically either controlled by compare timer T12 or by a typical hall
sensor pattern at the interrupt inputs (block commutation).
Data Sheet
f
f
CPU
CPU
The timer registers (T12, T13) are not directly accessible.
The period and offset registers are loading a value into the timer registers.
The Capture/Compare Unit CAPCOM6
CAPCOM6 Block Diagram
Period Register
Period Register
Control Register
Offset Register
Timer T12
Timer T13
Compare
Compare
T12P
T13P
CTCON
T12OF
16-bit
10-bit
Select Register
Compare Register
CC6MSEL
CC Channel 0
CC Channel 1
CC Channel 2
Mode
CMP13
CC60
CC61
CC62
37
Trap Register
CC6MCON.H
Commutation
Control
Control
Logic
Block
Port
Functional Description
XC167CI-16F
CC6POS0
CC6POS1
CC6POS2
CTRAP
CC60
COUT60
CC61
COUT61
CC62
COUT62
COUT63
Derivatives
V1.3, 2006-08
MCB04109