BD5242G-TR Rohm Semiconductor, BD5242G-TR Datasheet - Page 5

• Manufacturer Part Number: BD5242G-TR
• Description: IC DETECTOR VOLT 4.2V ODRN 5SSOP
• Manufacturer: Rohm Semiconductor
• Type: Simple Reset/Power-On Resetr
• Series: -r

Specifications of BD5242G-TR

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Voltage - Threshold: 4.2V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 5-SSOP
• Reset Timeout: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Reset Timeout: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

 Setting of Detector Delay Time
 Reference Data of Falling Time (T
 Explanation of Operation
 Timing Waveforms
© 2009 ROHM Co., Ltd. All rights reserved.
BD52□□G, BD52□□FVE, BD53□□G, BD53□□FVE series
www.rohm.com
V
V
V
CT
OUT
DD
This detector IC can be set delay time at the rise of V
Delay time at the rise of V
voltage(V
For both the open drain type (Fig.15) and the CMOS output type (Fig.16), the detection and release voltages are used as
threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal
voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BD52□□G/FVE series uses an open drain
output type, it is possible to connect a pull-up resistor to VDD or another power supply [The output “High” voltage (VOUT) in
this case becomes VDD or the voltage of the other power supply].
Example: the following shows the relationship between the input voltage V
voltage V
Fig.15 and 16).
V
Examples of Falling Time (T
*This data is for reference only.
DET
0V
The figures will vary with the application, so please confirm actual operating conditions before use.
GND
V
V
C
+ΔV
DD
1/2 V
CTH
CT
V
OUT
DET
:
V
OPL
Fig.15 (BD52□□Type Internal Block Diagram)
:
T
Part Number
DET
DET
PHL
DD
+∆V
BD5227G
BD5327G
Vref
when the input power supply voltage V
T
R3
DET
①
CT pin Externally Attached Capacitance
CT pin Threshold Voltage（P.2 V
PLH
)
R1
R2
= -C
②
CT
T
Fig.17
PLH
×R
DD
T
③
PHL
CT
PHL
T
×ln
Q3
PLH
PHL
) Output
④
：Time until when Vout rise to 1/2 of V
) Output
tPHL[µs] -40°C
CT
T
PLH
⑤
30.8
26.8
V
Q1
DD
V
CTH
-V
DD
CTH
DD
V
refer.）
DD
OUT
after over the operating limit voltage (V
possible that the reset signal is not outputted when the rise time of
VDD is faster than T
by the capacitor connected to CT terminal.
voltage (V
voltages will switch to L.
V
supply is powered down or when there is a power supply fluctuation,
V
release voltage is known as the hysteresis width (∆V
system is designed such that the output does not flip-flop with power
supply
malfunctions due to noise.
R
1
V
is made to sweep up and sweep down (The circuits are those in
2
3
4
5
L
5/9
OUT
OUT
DD
When the power supply is turned on, the output is unsettled from
When V
RESET
If V
If V
The potential difference between the detection voltage and the
switches from L to H (with a delay to the CT terminal).
switches to L (with a delay of T
DD
DD
fluctuations
drops below the detection voltage (V
DET
GND
exceeds the reset release voltage (V
DD
tPHL[µs] ,+25°C
V
DD
R
Ln : Natural Logarithm
+∆V
CT
is greater than V
Fig.16 (BD53□□Type Internal Block Diagram)
: CT pin Internal Impedance （P.2 R
DET
DD
30
26
PHL
Vref
DD
, the CT Terminal Voltage V
), the CT terminal (V
R3
within
.
after V
R1
R2
DD
this
OPL
rise up and beyond the release
PHL
but less than the reset release
hysteresis
OPL
Q3
).
tPHL[µs],+105°C
) until T
CT
V
CT
DD
Technical Note
2009.06 - Rev.B
) and output (V
28.8
24.8
DET
CT
PHL
width,
DET
) when the power
and the output
. There fore it is
Q2
Q1
+∆V
CT
refer.）
preventing
DET
DET
V
OUT
), then
). The
RESET
OUT
)