MC9S08AC32CPUE Freescale Semiconductor, MC9S08AC32CPUE Datasheet - Page 55

IC MCU 8BIT 32K FLASH 64-LQFP

MC9S08AC32CPUE

Manufacturer Part Number
MC9S08AC32CPUE
Description
IC MCU 8BIT 32K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC32CPUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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4.4.5
An access error occurs whenever the command execution protocol is violated.
4.4.6
Block protection prevents program or erase changes for FLASH memory locations in a designated address
range. Mass erase is disabled when any block of FLASH is protected. The MC9S08AC60 Series allows a
block of memory at the end of FLASH, and/or the entire FLASH memory to be block protected. A disable
control bit and a 3-bit control field, allows the user to set the size of this block. A separate control bit allows
block protection of the entire FLASH memory array. All seven of these control bits are located in the
FPROT register (see
At reset, the high-page register (FPROT) is loaded with the contents of the NVPROT location which is in
the nonvolatile register block of the FLASH memory. The value in FPROT cannot be changed directly
from application software so a runaway program cannot alter the block protection settings. If the last 512
bytes of FLASH which includes the NVPROT register is protected, the application program cannot alter
the block protection settings (intentionally or unintentionally). The FPROT control bits can be written by
background debug commands to allow a way to erase a protected FLASH memory.
One use for block protection is to block protect an area of FLASH memory for a bootloader program. This
bootloader program then can be used to erase the rest of the FLASH memory and reprogram it. Because
the bootloader is protected, it remains intact even if MCU power is lost in the middle of an erase and
reprogram operation.
Freescale Semiconductor
Any of the following specific actions will cause the access error flag (FACCERR) in FSTAT to be
set. FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can
be processed.
Writing to a FLASH address before the internal FLASH clock frequency has been set by writing
to the FCDIV register
command buffer is empty.)
Writing a second time to a FLASH address before launching the previous command (There is only
one write to FLASH for every command.)
Writing a second time to FCMD before launching the previous command (There is only one write
to FCMD for every command.)
Writing to any FLASH control register other than FCMD after writing to a FLASH address
Writing any command code other than the five allowed codes ($05, $20, $25, $40, or $41) to
FCMD
Writing any FLASH control register other than the write to FSTAT (to clear FCBEF and launch the
command) after writing the command to FCMD
The MCU enters stop mode while a program or erase command is in progress (The command is
aborted.)
Writing the byte program, burst program, or page erase command code ($20, $25, or $40) with a
background debug command while the MCU is secured (The background debug controller can
only do blank check and mass erase commands when the MCU is secure.)
Writing 0 to FCBEF to cancel a partial command
Writing to a FLASH address while FCBEF is not set (A new command cannot be started until the
Access Errors
FLASH Block Protection
Section 4.6.4, “FLASH Protection Register (FPROT and
MC9S08AC60 Series Data Sheet, Rev. 2
NVPROT)”).
Chapter 4 Memory
55

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