XR17D158CV-F Exar Corporation, XR17D158CV-F Datasheet - Page 40

• Manufacturer Part Number: XR17D158CV-F
• Description: IC UART PCI BUS OCTAL 144LQFP
• Manufacturer: Exar Corporation
• Type: IrDA or RS- 485r

Specifications of XR17D158CV-F

• Number Of Channels: 8
• Package / Case: 144-LQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• No. Of Channels: 8
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 3V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1291

XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
N
See
See
The Baud Rate Generator (BRG) is a 16-bit counter that generates the data rate for the transmitter and
receiver. The baud rate is programmed through registers DLL and DLM which are only accessible when LCR
bit-7 is set to logic 1. See
5.8
T
5.8.1
5.8.2
5.8.3
A
OTE
ABLE
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 0
1 0 1 1
1 0 1 1
1 1 0 0
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
A3-A0
DDRESS
“Section 5.3, Receiver” on page 33
“Section 5.2, Transmitter” on page 31
: MCR bits 2 and 3 (OP1 and OP2 outputs) are not available in the XR17D158. They are present for 16C550
compatibility during Internal loopback, see
13: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION.
Registers
Receive Holding Register (RHR) - Read-Only
Transmit Holding Register (THR) - Write-Only
Baud Rate Generator Divisors (DLL and DLM) - Read/Write
TXTRG
RXCNT
RXTRG
XCHAR
TXCNT
XOFF1
XOFF2
FCTR
XON1
XON2
N
SPR
R
EFR
AME
EG
W
R
R/W
R/W
R/W
EAD
RITE
W
W
W
W
W
W
R
R
R
/
“Section 5.1, Programmable Baud Rate Generator” on page 30
CTS/DSR
Enable
B
Table
Bit-7
TRG
Auto
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-1
IT
0
-7
RTS/DTR
Enable
B
Table
TRG
Bit-6
Auto
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-0
IT
0
-6
for complete details.
for complete details.
Figure 18
Special
RS485
Enable
Select
B
Char
Bit-5
Auto
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
IT
0
-5
40
MCR[7:5,2]
FCR[5:4],
IER [7:5],
ISR [5:4],
MSR[7:4]
RX Input
Invert IR
.
Enable
B
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
IT
0
-4
Hyst Bit-3
RTS/DTR
Flow Cntl
Software
B
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
IT
0
-3
Hyst Bit-2
RTS/DTR
Flow Cntl
Software
B
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
IT
0
-2
S
HADED BITS ARE ENABLED BY
RTS/DTR
Hyst Bit-1
Flow Cntl
Software
Xon Det.
Indicator
B
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
IT
-1
xr
RTS/DTR
Hyst Bit-0
Flow Cntl
Software
Xoff Det.
Indicator
for more detail.
B
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
IT
-0
REV. 1.2.2
EFR B
User Data
C
after read
Self-clear
OMMENT
IT
-4.