XR17D158 Exar Corporation, XR17D158 Datasheet

XR17D158

Manufacturer Part Number

XR17D158

Description

Eight-channel Pci-bus Uart

Manufacturer

Exar Corporation

Datasheet

1.XR17D158.pdf (66 pages)

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Download datasheet (730Kb)

FEBRUARY 2003

GENERAL DESCRIPTION

The XR17D158

Asynchronous Receiver and Transmitter (UART) with

support for PCI Bus universal VIO buffers in the same

package and pin-out as the XR17C158. The device

is designed to meet the 32-bit PCI Bus and high

bandwidth requirement in communication systems. A

global interrupt source register provides a complete

interrupt status indication for all 8 channels to speed

up interrupt parsing. Each UART has its own 16C550

compatible set of configuration registers, transmit and

receive FIFOs of 64 bytes, fully programmable

transmit and receive FIFO level trigger level, transmit

and receive FIFO level counters, automatic RTS/CTS

programmable hysteresis, automatic software (Xon/

Xoff) flow control, IrDA (Infrared Data Association)

encoder/decoder, 8 multi-purpose definable inputs/

outputs, and a 16-bit general purpose timer/counter.

APPLICATIONS

Exar

OTE

IGURE

Universal Form Factor PCI Bus Add-in Card

Remote Access Servers

Network Management

Factory Automation and Process Control

Point-of-Sale Systems

Multi-port RS-232/RS-422/RS-485 Cards

DTR/DSR

Corporation 48720 Kato Road, Fremont CA, 94538

1 Covered by U.S. Patents #5,649,122 and #5,949,787

1. B

LOCK

(D158) is an octal PCI Bus Universal

3.3V or 5V

CLK

RST#

AD[31:0]

C/BE[3:0]#

FRAME#

IRDY#

TRDY#

DEVSEL#

STOP#

INTA#

IDSEL

PERR#

SERR#

PAR

EECK

EEDI

EEDO

EECS

hardware

VIO

IAGRAM

Configuration

PCI Local

EEPROM

Registers

flow

Interface

Space

Bus

control

Timer/Counter

PRELIMINARY

16-bit

Configuration

UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART

Registers

Device

with

•

(510) 668-7000

FEATURES

High Performance Octal UART

Universal PCI Bus Buffers - 3.3V or 5V Operation

32-bit PCI Bus 2.2 Target Interface Compliance

32-bit PCI Bus Interface with EEPROM Interface

A Global Interrupt Source Register for all 8 UARTs

Data Transfer in Byte, Word and Double-word

Data Read/Write Burst Operation

Each UART is independently controlled with:

Eight Multi-Purpose Inputs/outputs

A General Purpose 16-bit Timer/counter

Sleep Mode with Automatic Wake-up

Same Package and Pin-out as the XR17C158 and

XR17C154 (20x20x1.4mm 144-pin TQFP)

16C550 Compatible 5G Register Set

64-byte Transmit and Receive FIFOs

Transmit and Receive FIFO Level Counters

Programmable TX and RX FIFO Trigger Level

Automatic RTS/CTS or DTR/DSR Flow Control

Automatic Xon/Xoff Software Flow Control

RS485 HDX Control Output with Selectable

Turn-around Delay

Infrared (IrDA 1.0) Data Encoder/Decoder

Programmable Data Rate with Prescaler

Up to 6.25 Mbps Serial Data Rate

UART

Regs

BRG

Crystal Osc/Buffer

UART Channel 1

UART Channel 2

UART Channel 3

UART Channel 4

UART Channel 5

UART Channel 0

UART Channel 6

UART Channel 7

Inputs/Outputs

Multi-purpose

•

TX & RX

64 Byte RX FIFO

64 Byte TX FIFO

FAX (510) 668-7017

ENDEC

TX0, RX0, DTR0#,

DSR0#, RTS0#,

CTS0#, CD0#, RI0#

TX7, RX7, DTR7#,

DSR7#, RTS7#,

CTS7#, CD7#, RI7#

MPIO0- MPIO7

XTAL1

XTAL2

TMRCK

XR17D158

(Core Logic)

GND

5V VCC

•

www.exar.com

REV. P1.0.0

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