XR17D158 Exar Corporation, XR17D158 Datasheet - Page 43

• Manufacturer Part Number: XR17D158
• Description: Eight-channel Pci-bus Uart
• Manufacturer: Exar Corporation

XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
REV. P1.0.0
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format. Logic
0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The receiver
must be programmed to check the same format (default).
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Logic 1 = EVEN Parity is generated by forcing an even the number of logic 1’s in the transmitted character.
The receiver must be programmed to check the same format.
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
Table 14
LCR B
for parity selection summary below.
BIT-2
X
0
0
1
1
0
1
1
IT
-5 LCR B
T
ABLE
X
0
1
0
1
LENGTH
5,6,7,8
W
IT
6,7,8
-4
ORD
14: P
5
LCR B
ARITY SELECTION
43
3
0
1
1
1
1
IT
-
Forced parity to space,
S
Force parity to mark,
TOP BIT LENGTH
P
(B
1 (default)
ARITY SELECTION
IT TIME
Even parity
Odd parity
1-1/2
No parity
2
“1”
“0”
(
S
))
PRELIMINARY
áç
áç
áç
áç