XR17D158 Exar Corporation, XR17D158 Datasheet - Page 18
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XR17D158
Manufacturer Part Number
XR17D158
Description
Eight-channel Pci-bus Uart
Manufacturer
Exar Corporation
Datasheet
1.XR17D158.pdf
(66 pages)
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PRELIMINARY
.
F
RXRDY and RXRDY Time-out is clear by reading data in the RX FIFO until it falls below the trigger level.
RX Line Status interrupt clears after reading the LSR register.
TXRDY interrupt clears after reading ISR register that is in the UART channel register set.
Modem Status Register interrupt clears after reading MSR register that is in the UART channel register set.
RTS/CTS or DTR/DSR delta interrupt clears after reading MSR register that is in the UART channel register set.
Xoff/Xon delta and special character detect interrupt clears after reading the ISR register that is in the UART channel reg-
ister set.
TIMER Time-out interrupt clears after reading the TIMERCNTL register that is in the Device Configuration register set.
MPIO interrupt clears after reading the MPIOLVL register that is in the Device Configuration register set.
P
IGURE
RIORITY
N +2
B it
1
2
3
4
5
6
7
x
R svd
N +1
B it
6. T
B
B it
N
HE
IT
[
0
0
0
0
1
1
1
1
INT3 Register
N
G
N +2
+2]
B it
LOBAL
R svd
N +1
B it
B
IT
I
T
[
B it
NTERRUPT
N
0
0
1
1
0
0
1
1
N
ABLE
+1]
N +2
T
B it
ABLE
5: UART C
R svd
N +1
B it
B
IT
0
1
0
1
0
1
0
1
R
6: UART C
[
N
EGISTER
B it
N
]
N +2
None
RXRDY and RX Line Status (logic OR of LSR[4:1])
RXRDY Time-out
TXRDY, THR or TSR (auto RS485 mode) empty
MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon det. or special char. detected
Reserved.
MPIO pin(s). Available only within channel 0, reserved in other channels.
TIMER Time-out. Available only within channel 0, reserved in other chan-
nels.
B it
HANNEL
R svd
, INT0, INT1, INT2
INT0, INT1, INT2 and INT3
N +1
B it
HANNEL
Interrupt Registers,
INT2 Register
B it
N
[7:0] I
N +2
18
B it
[7:0] I
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
C ha n n el-3
NTERRUPT
N +1
B it
NTERRUPT
B it
N
AND
I
N +2
NTERRUPT
B it
S
INT3
OURCE
C ha n n el-2
R svd
N +1
B it-7
B it
C
LEARING
R svd R svd
B it-6
B it
N
E
S
NCODING
OURCE
B it-5
N +2
B it
:
C ha n n el-1
INT0 Register
R svd
B it-4
N +1
(
INT1 Register
B it
S
)
C h-3 C h-2 C h-1 C h-0
B it-3
B it
N
N +2
B it-2
B it
C ha n n el-0
N +1
B it-1
B it
XR17D158
REV. P1.0.0
B it-0
B it
N