XR16L2750IM-F Exar Corporation, XR16L2750IM-F Datasheet - Page 22
![IC UART FIFO 64B DUAL 48TQFP](/photos/16/10/161019/tqfp-48_sml.jpg)
XR16L2750IM-F
Manufacturer Part Number
XR16L2750IM-F
Description
IC UART FIFO 64B DUAL 48TQFP
Manufacturer
Exar Corporation
Type
IrDA or RS- 485r
Datasheet
1.XR16L2750CM-F.pdf
(48 pages)
Specifications of XR16L2750IM-F
Number Of Channels
2, DUART
Package / Case
48-TQFP
Features
*
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.25 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
6.25 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
No. Of Channels
2
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
2.25V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
TQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1280
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16L2750IM-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L2750IM-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
XR16L2750
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
See “Receiver” on page 12.
See “Transmitter” on page 11.
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
4.0 INTERNAL REGISTER DESCRIPTIONS
4.1
4.2
4.3
A
A2-A0
DDRESS
0 0 0
0 0 0
0 0 1
0 0 0
0 0 1
0 0 0
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
1 1 1
T
Receive Holding Register (RHR) - Read- Only
Transmit Holding Register (THR) - Write-Only
Interrupt Enable Register (IER) - Read/Write
ABLE
XOFF1 RD/WR
XOFF2 RD/WR
DREV
XON1 RD/WR
XON2 RD/WR
FCTR RD/WR
N
DVID
DLM
TRG
EFR
R
DLL
FC
AME
EG
8: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR
RD/WR
R
W
WR
RD
RD
RD
EAD
RITE
/
Enable
RX/TX
Mode
B
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Auto
Bit-7
Bit-7
Bit-7
Bit-7
CTS
IT
0
-7
SCPAD
Enable
Swap
B
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Auto
RTS
Bit-6
Bit-6
Bit-6
Bit-6
IT
0
-6
Baud Rate Generator Divisor
Enhanced Registers
Special
Select
Table
B
Char
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-1
Bit-5
Bit-5
Bit-5
Bit-5
Trig
IT
0
-5
22
IER [7:4],
ISR [5:4],
FCR[5:4],
MCR[7:5]
Enable
Table
B
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-0
Bit-4
Bit-4
Bit-4
Bit-4
Trig
IT
0
-4
S
HADED BITS ARE ENABLED WHEN
Direction
Control
RS485
B
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Auto
Soft-
ware
Flow
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Cntl
IT
1
-3
RX IR
B
Input
ware
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Soft-
Flow
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Cntl
Inv.
IT
0
-2
B
Soft-
ware
Flow
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Auto
RTS
Hyst
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Cntl
IT
1
-1
EFR B
B
ware
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Auto
Hyst
Bit-0
Soft-
Flow
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
RTS
Cntl
xr
IT
0
-0
IT
-4=1
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR=0
DLM=0x00
DLL=0x00
C
LCR[7]=1
LCR[7]=1
REV. 1.2.1
OMMENT
X
BF