SX1441EVK Semtech, SX1441EVK Datasheet - Page 43

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SX1441EVK

Manufacturer Part Number
SX1441EVK
Description
KIT DEV FOR SX1441
Manufacturer
Semtech
Series
EasyBlue™r
Type
Bluetoothr
Datasheet

Specifications of SX1441EVK

For Use With/related Products
SX1441
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Contents
-
Other names
SX1441DVK
SX1441DVK
Personal Area Network
The internal PWM signals are low as long as the counter contents are higher than the PWM code values written in
the RegCntX registers. They are high when the counter contents are smaller or equal to these PWM code values.
In order to have glitch free outputs, the PWM outputs on PB[0] and PB[1] are sampled versions of these internal
PWM signals, therefore delayed by one counter clock cycle.
The PWM resolution is always 8 bits when a single counter is used for the PWM signal generation.
RegCntConfig2 register is used to set the PWM resolution for counters A and B or C and D respectively when
they are in cascaded mode. The different possible resolutions in cascaded mode are shown in Table 72 - PWM
resolution. Choosing a 16-bit PWM code which is higher than the maximum value results in a PWM output always
tied to 1. The maximum value is 2
The period T
The duty cycle ratio DCR of the PWM signal is defined as:
DCR can be selected between
DCR (in %) as a function of the RegCntX content(s) is given by the relation:
3.10.8 Counter Capture Function
The 16-bit capture register is provided to facilitate frequency measurements. It provides a safe reading mechanism
for the counters A and B when they are running. When the capture function is active, the processor does not read
the counters A and B directly anymore, but instead reads shadow registers located in the capture block. An
interrupt is generated after a capture condition has been met when the shadow register content is updated. The
capture condition is user defined by selecting either internal capture signal sources derived from the prescaler or
from the external PA[2] or PA[3] ports. Both counters use the same capture condition.
© Semtech 2006
RegCntConfig2[1:0] or RegCntConfig2[3:2]
11
10
01
00
per
of the PWM signal is given by the formula:
DCR =
Small PWM code
Large PWM code
T
T
per
h
2
, where T
resolution
resolution – 1
100
DCR
Figure 19 - PWM modulation examples
% and 100 %.
h
.
=
is the time during which the output is “high” within T
MIN
Table 72 - PWM resolution
T
per
100
T
llarge
=
43
2
(
1
2
resolution
f
+
resolution
ckcnt
PWM Resolution
16 bits
14 bits
12 bits
10 bits
RegCntX
T
lsmall
T
T
hlarge
per
)
,
100
T
hsmall
SX1441 – Bluetooth® 1.2 SoC
per
www.semtech.com
Data Sheet

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