EM250-JMP-R Ember, EM250-JMP-R Datasheet - Page 66
![KIT JUMP START FOR EM250](/photos/14/10/141062/em250-jmp_board_1_sml.jpg)
EM250-JMP-R
Manufacturer Part Number
EM250-JMP-R
Description
KIT JUMP START FOR EM250
Manufacturer
Ember
Series
JumpStartr
Type
802.15.4/Zigbeer
Specifications of EM250-JMP-R
Frequency
2.4GHz
For Use With/related Products
EM250
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
636-1001
EM250-JMP
EM250-JSK
EM250-JMP
EM250-JSK
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EM250
66
120-0082-000I
The following signals can be made available on the GPIO pins:
The I
by a clock division ratio from the 24MHz clock:
EXP is written to the
tings for Standard I
Nominal Rate
100kbps
375kbps
400kbps
Note that, at 400kbps, the I
I
The I
SC_I2CSTART
summarizes these frames.
Full I
essary segment transitions are shown in Figure 7. ACK or NACK generation of an I
determined with the register bit
Generation of a 7-bit address is accomplished with one transmit segment. The upper 7 bits of the transmitted
character contain the 7-bit address. The remaining lower bit contains the command type (“read” or “write”).
Generation of a 10-bit address is accomplished with two transmit segments. The upper 5 bits of the first
transmit character must be set to
dress. The remaining lower bit contains the command type (“read” or “write”). The second transmit segment
is for the remaining 8 bits of the 10-bit address.
2
C compliant, the rate needs to be lowered to 375kbps.
SDA (serial data)
SCL (serial clock)
Nominal Rate = 24MHz / ( 2 * (LIN + 1) * 2
2
2
2
C frames have to be constructed under software control by generating individual I
C Master controller obtains its reference clock from a programmable clock generator. Clock rates are set
C Master controller supports generation of various frame segments defined by the register bits
,
SC_I2CSTOP
2
C (100kbps) and Fast I
SC2_RATEEXP
2
,
C specification requires the minimum low period of SCL to be 1.3µs. To be strictly
SC_I2CSEND
SC_I2CACK
Table 26. I
0x1E
register and LIN to the
SC2_RATELIN
14
15
14
. The next 2 bits are for the 2 most significant bits of the 10-bit ad-
2
, and
C (400kbps) operation.
2
in the
C Nominal Rate Programming
EXP
SC_I2CRECV
)
SC2_I2CCTRL2
SC2_RATELIN
within the
register.
SC2_I2CCTRL1
register. Table 26 shows the rate set-
SC2_RATEEXP
3
1
1
2
C receive frame segment is
register. Table 27
2
C segments. All nec-
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