MLX71121KLQ Melexis Inc, MLX71121KLQ Datasheet - Page 4

• Manufacturer Part Number: MLX71121KLQ
• Description: RCVR FSK/FM/ASK 32-QFN
• Manufacturer: Melexis Inc

Specifications of MLX71121KLQ

• Frequency: 300MHz ~ 930MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 100 kbps
• Modulation Or Protocol: ASK, FM, FSK
• Applications: General Remote Control, Garage Opener, RKE
• Current - Receiving: 8.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Features: RSSI Equipped
• Voltage - Supply: 2.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-QFN
• Data Rate: 100Kbps
• Frequency Range: 300MHz To 930MHz
• Modulation Type: AM, FM, FSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 2.1V To 5.5V
• Operating Temperature Range: -40°C To
• Sensitivity Dbm: -112dBm
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: MLX71121A

1
1.1
The MLX71121 receiver architecture is based on a double-conversion super-heterodyne approach. The two
LO signals are derived from an on-chip integer-N PLL frequency synthesizer. The PLL reference frequency
is derived from a crystal (XTAL). As the first intermediate frequency (IF1) is very high, a reasonably high
degree of image rejection is provided even without using an RF front-end filter. At applications asking for
very high image rejections, cost-efficient RF front-end filtering can be realized by using a SAW filter in front
of the LNA. The second mixer MIX2 is an image-reject mixer.
The receiver signal chain can be setup by one or two low noise amplifiers (LNA1, LNA2), two down-
conversion mixers (MIX1, MIX2), an on-chip IF filter (IFF) as well as an IF amplifier (IFA). By choosing the
required modulation via an FSK/ASK switch (at pin MODSEL), either the on-chip FSK demodulator (FSK
DEMOD) or the RSSI-based ASK detector is selected. A second order data filter (OA1) and a data slicer
(OA2) follow the demodulator. The data slicer threshold can be generated from the mean-value of the data
stream or by means of the positive and negative peak detectors (PKDET+/-). Some post-processing of the
data output signal can be performed by means a noise cancellation filter (NCF).
The dual LNA configuration can be used for antenna space diversity or antenna frequency diversity or to
setup an LNA cascade (to further improve the input sensitivity). Another option is to set up the two LNAs for
feeding the RF signal differentially.
A sequencer circuit (SEQ) controls the timing during start-up. This is to reduce start-up time and to minimize
power dissipation.
A clock output, which is a divide-by-8 version of the crystal oscillator signal, can be used to drive a microcon-
troller. The clock output is an open drain and gets activated only if a loading resistor is connected to positive
supply.
1.2
* at 4kbps NRZ, BER = 3⋅10
39010 71121
Rev. 009
Input frequency ranges: 300 to 470MHz
Power supply range: 2.1 to 5.5V
Temperature range: -10 to +70°C
Shutdown current: 50 nA
Operating current: 10.0 to 11.1mA
FSK input sensitivity: -107dBm* (433MHz)
ASK input sensitivity: -112dBm* (433MHz)
Internal IF: 1.8MHz with 300kHz 3dB bandwidth
FSK deviation range: ±10kHz to ±100kHz
Theory of Operation
General
Technical Data Overview
-3
610 to 930MHz
, at LNA input pins
Page 4 of 28
MCU clock frequency: 2.0 to 3.4MHz
Image rejection:
65dB 1
25dB 2
Maximum data rate: 50kps RZ (bi-phase) code,
Spurious emission: < -54dBm
Usable RSSI range: 45 to 55dB
Crystal frequency: 16 to 27MHz
st
nd
IF (with external RF front-end filter)
IF (internal image rejection)
FSK/FM/ASK Receiver
100kps NRZ
MLX71121
300 to 930MHz
Data Sheet
Oct/10