MLX71121KLQ Melexis Inc, MLX71121KLQ Datasheet - Page 5

• Manufacturer Part Number: MLX71121KLQ
• Description: RCVR FSK/FM/ASK 32-QFN
• Manufacturer: Melexis Inc

Specifications of MLX71121KLQ

• Frequency: 300MHz ~ 930MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 100 kbps
• Modulation Or Protocol: ASK, FM, FSK
• Applications: General Remote Control, Garage Opener, RKE
• Current - Receiving: 8.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Features: RSSI Equipped
• Voltage - Supply: 2.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-QFN
• Data Rate: 100Kbps
• Frequency Range: 300MHz To 930MHz
• Modulation Type: AM, FM, FSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 2.1V To 5.5V
• Operating Temperature Range: -40°C To
• Sensitivity Dbm: -112dBm
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: MLX71121A

1.3
The MLX71121 receiver IC consists of the following building blocks:
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39010 71121
Rev. 009
PLL synthesizer (PLL SYNTH) to generate the first and second local oscillator signals LO1 and LO2.
The PLL SYNTH consists of a fully integrated voltage-controlled oscillator (VCO), a distributed feedback
divider chain (N1,N2), a phase-frequency detector (PFD) a charge pump (CP), a loop filter (LF) and a
crystal-based reference oscillator (RO).
Two low-noise amplifiers (LNA1, LNA2) for high-sensitivity RF signal reception
First mixer (MIX1) for down-conversion of the RF signal to the first IF (intermediate frequency)
Second mixer (MIX2) with image rejection for down-conversion from the first to the second IF
IF Filter (IFF) with a 1.8MHz center frequency and a 300kHz 3dB bandwidth
IF amplifier (IFA) to provide a high voltage gain and an RSSI signal output
FSK demodulator (FSK DEMOD)
Operational amplifiers OA1 and OA2 for low-pass filtering and data slicing, respectively
Positive (PKDET+) and negative (PKDET-) peak detectors
Switches SW1 to select between FSK and ASK as well as SW2 to chose between averaging or peak
detection mode.
Noise cancellation filter (NCF)
Sequencer circuit (SEQ) and biasing (BIAS) circuit
Clock output (DIV8)
Block Diagram
7
VEE
2
1
32
LNAI2
8
VEE
31
26
LNASEL
RFSEL
TEST
LNAI1
LNA1
LNA2
3
BIAS
30
SEQ
6
4
5
MIX1
LO1
VCO
counter
9
N1
Fig. 1:
MIX2
10
LF
LO2
counter
N2
MLX71121 block diagram
11
Page 5 of 28
IFF
CP
12
PFD
13
RO
27
25
IFA
24
DIV 8
28
ASK
DEMOD
FSK
FSK
15
14
SW1
FSK/FM/ASK Receiver
SW2
22
100k
17
MLX71121
100k
19
300 to 930MHz
16
OA2
PKDET _
PKDET+
OA1
NCF
Data Sheet
DTAO
CINT
DFO
PDP
PDN
20
29
23
18
21
Oct/10