ATMEGA128RZAV-8AU Atmel, ATMEGA128RZAV-8AU Datasheet - Page 50

MCU ATMEGA1281/AT86RF230 64-TQFP

ATMEGA128RZAV-8AU

Manufacturer Part Number
ATMEGA128RZAV-8AU
Description
MCU ATMEGA1281/AT86RF230 64-TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA128RZAV-8AU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
Operating Temperature Range
- 40 C to + 85 C
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
8.3 Energy Detection (ED)
8.3.1 Overview
8.3.2 Request an ED Measurement
50
AT86RF230
Bit
0x06
Read/Write
Reset value
Bit
0x06
Read/Write
Reset value
Register 0x06 (PHY_RSSI)
The PHY_RSSI register is a multi purpose register to indicate the current received
signal strength (RSSI) and the FCS validity of a received frame.
• Bit 7 – RX_CRC_VALID
This register bit indicates whether a received frame has a valid FCS. The register bit is
updated when issuing the TRX_END interrupt remains valid until the next TRX_END
interrupt caused by a new frame reception.
Table 8-3. RX FCS Result
• Bit [6:5] – Reserved
• Bit [4:0] – RSSI
Refer to section 8.4.4.
The main features for the Energy Detection module are:
• 85 unique energy levels defined
• 1 dB resolution
The receiver Energy Detection measurement is used by a network layer as part of a
channel selection algorithm. It is an estimation of the received signal power within the
bandwidth of an IEEE 802.15.4-2003 channel. No attempt is made to identify or decode
signals on the channel. The ED value is calculated by averaging RSSI values over eight
symbols (128 µs).
There are two ways implemented in the AT86RF230 to initiate an ED measurement:
• Manually, by a write access to register 0x07 (PHY_ED_LEVEL), or
• Automatically, by detecting a valid SFD of an incoming frame.
For manually initiated ED measurement the radio transceiver needs to be in one of the
states RX_ON or BUSY_RX. An automated ED measurement is started, if a SFD field
is detected. A valid SFD detection is signalized by an RX_START interrupt in Basic
Operating Mode.
Register Bit
RX_CRC_VALID
RX_CRC_VALID
R
R
7
0
3
0
Value
0
1
R
R
6
0
2
0
Description
FCS is not valid.
FCS is valid.
Reserved
RSSI
R
R
5
0
1
0
RSSI
R
R
4
0
0
0
5131E-MCU Wireless-02/09
PHY_RSSI
PHY_RSSI

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