ATMEGA256RZAV-8AU Atmel, ATMEGA256RZAV-8AU Datasheet - Page 109

MCU ATMEGA2561/AT86RF230 64-TQFP

ATMEGA256RZAV-8AU

Manufacturer Part Number
ATMEGA256RZAV-8AU
Description
MCU ATMEGA2561/AT86RF230 64-TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA256RZAV-8AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Applications
ISM, ZigBee™
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
15.5mA
Current - Transmitting
16.5mA
Data Interface
PCB, Surface Mount
Memory Size
256kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega256
13.3
2549M–AVR–09/10
Moving Interrupts Between Application and Boot Section
When the BOOTRST Fuse is programmed and the Boot section size set to 8 Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed, the Boot section size set to 8 Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The MCU Control Register controls the placement of the Interrupt Vector table, see Code Exam-
ple below. For more details, see
Address Labels Code
.org 0x0002
0x00002
0x00004
...
0x00070
;
.org 0x1F000
0x1F000 RESET: ldi
0x1F001
0x1F002
0x1F003
0x1F004
0x1F005
Address
;
.org 0x1F000
0x1F000
0x1F002
0x1F004
...
0x1F070
;
0x1F072
0x1F073
0x1F074
0x1F075
0x1F076
0x1FO77
Labels Code
RESET: ldi
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
EXT_INT0
EXT_INT1
...
USART3_TXC
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
...
USART3_TXC
r16,high(RAMEND) ; Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
ATmega640/1280/1281/2560/2561
“Reset and Interrupt Handling” on page
xxx
Comments
; IRQ0 Handler
; IRQ1 Handler
;
; USART3 TX Complete Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; USART3 TX Complete Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
18.
109

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