ATMEGA256RZAV-8AU Atmel, ATMEGA256RZAV-8AU Datasheet - Page 16

MCU ATMEGA2561/AT86RF230 64-TQFP

ATMEGA256RZAV-8AU

Manufacturer Part Number
ATMEGA256RZAV-8AU
Description
MCU ATMEGA2561/AT86RF230 64-TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA256RZAV-8AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Applications
ISM, ZigBee™
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
15.5mA
Current - Transmitting
16.5mA
Data Interface
PCB, Surface Mount
Memory Size
256kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega256
6.6
2549M–AVR–09/10
Stack Pointer
Figure 6-3.
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack
Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM must be defined by the program before
any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to
point above 0x0200. The initial value of the stack pointer is the last address of the internal
SRAM. The Stack Pointer is decremented by one when data is pushed onto the Stack with the
PUSH instruction, and it is decremented by two for ATmega640/1280/1281 and three for
ATmega2560/2561 when the return address is pushed onto the Stack with subroutine call or
interrupt. The Stack Pointer is incremented by one when data is popped from the Stack with the
POP instruction, and it is incremented by two for ATmega640/1280/1281 and three for
ATmega2560/2561 when data is popped from the Stack with return from subroutine RET or
return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register
will not be present.
X-register
Y-register
Z-register
Bit
0x3E (0x5E)
0x3D (0x5D)
Read/Write
Initial Value
The X-, Y-, and Z-registers
SP15
SP7
R/W
R/W
15
7
0
1
15
7
R27 (0x1B)
15
7
R29 (0x1D)
15
7
R31 (0x1F)
SP14
SP6
R/W
R/W
14
6
0
1
SP13
SP5
R/W
R/W
ATmega640/1280/1281/2560/2561
13
5
1
1
XH
YH
ZH
0
SP12
R/W
R/W
SP4
12
4
0
1
SP11
R/W
R/W
SP3
11
3
0
1
0
0
7
R26 (0x1A)
7
R28 (0x1C)
7
R30 (0x1E)
SP10
SP2
R/W
R/W
10
2
0
1
SP9
SP1
R/W
R/W
9
1
0
1
XL
YL
ZL
0
SP8
SP0
R/W
R/W
8
0
1
1
SPH
SPL
0
0
0
0
0
16

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