ATMEGA128RFA1-ZUR Atmel, ATMEGA128RFA1-ZUR Datasheet - Page 64
ATMEGA128RFA1-ZUR
Manufacturer Part Number
ATMEGA128RFA1-ZUR
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA128-16AU.pdf
(385 pages)
2.ATAVR128RFA1-EK1.pdf
(13 pages)
3.ATAVR128RFA1-EK1.pdf
(555 pages)
Specifications of ATMEGA128RFA1-ZUR
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
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9.5.1.2.2 Frame Control Field (FCF)
64
ATmega128RFA1
The FCF consists of 16 bits, and occupies the first two octets of either the MPDU or the
PSDU, respectively.
Figure 9-26. IEEE 802.15.4-2006 Frame Control Field (FCF)
Bit [2:0]: describe the frame type.
by IEEE 802.15.4, section 7.2.1.1.1.
Table 9-16. Frame Control Field – Frame Type Subfield
This subfield is used for address filtering by the third level filter rules. Only frame types
0 – 3 pass the third level filter rules (refer to section
Automatic address filtering of the radio transceiver is enabled when using the
RX_AACK mode (refer to
A reserved frame (frame type value > 3) can be received if bit AACK_UPLD_RES_FT of
register XAH_CTRL_1 is set. For details refer to chapter
802.15.4 Compliant Scenarios" on page
Operating Mode as explained in
Bit 3: indicates whether security processing applies to this frame.
Bit 4: is the “Frame Pending” subfield. This field can be set in an acknowledgment
frame (ACK) in response to a data request MAC command frame. This bit indicates that
the node, which transmitted the ACK, has more data to send to the node receiving the
ACK.
For acknowledgment frames automatically generated by the radio transceiver, this bit is
set according to the content of bit AACK_SET_PD of register CSMA_SEED_1 if the
received frame was a data request MAC command frame.
Bit 5: forms the “Acknowledgment Request” subfield. If this bit is set within a data or
MAC command frame that is not broadcast, the recipient shall acknowledge the
reception of the frame within the time specified by IEEE 802.15.4 (i.e. within 192 µs for
non beacon-enabled networks).
The radio transceiver parses this bit during RX_AACK mode and transmits an
acknowledgment frame if necessary.
In TX_ARET mode this bit indicates if an acknowledgement frame is expected after
transmitting a frame. If this is the case, the receiver waits for the acknowledgment
frame, otherwise the TX_ARET transaction is finished.
Frame Control Field Bit Assignments
Frame Type Value
100 – 111
b
2
000
001
010
011
b
1
b
0
"RX_AACK_ON – Receive with Automatic ACK" on page
Value
4 – 7
0
1
2
3
"Basic Operating Mode" on page
Table 9-16 below
53. Address filtering is also provided in Basic
Description
Beacon
Data
Acknowledge
MAC command
Reserved
summarizes frame types defined
"Frame Filtering" on page
"Configuration of non IEEE
36.
8266B-MCU Wireless-03/11
47).
55).
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