SI1000-C-GM Silicon Laboratories Inc, SI1000-C-GM Datasheet - Page 249
![IC TXRX MCU + EZRADIOPRO](/photos/14/21/142131/42-qfn-series_sml.jpg)
SI1000-C-GM
Manufacturer Part Number
SI1000-C-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Specifications of SI1000-C-GM
Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
20dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
85mA
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 4kB RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
20 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4.1 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
4352 B
Supply Current (max)
4.1 mA
Cpu Family
Si100x
Device Core
8051
Device Core Size
8b
Frequency (max)
25MHz
Total Internal Ram Size
4.25KB
# I/os (max)
22
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
18-chx10-bit
Instruction Set Architecture
CISC
Mounting
Surface Mount
Pin Count
42
Package Type
QFN EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1881-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI1000-C-GM
Manufacturer:
FSC
Quantity:
1 000
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23.3.6. Frequency Offset Adjustment
When the AFC is disabled the frequency offset can be adjusted manually by fo[9:0] in registers 73h and
74h. It is not possible to have both AFC and offset as internally they share the same register. The fre-
quency offset adjustment and the AFC both are implemented by shifting the Synthesizer Local Oscillator
frequency. This register is a signed register so in order to get a negative offset it is necessary to take the
twos complement of the positive offset number. The offset can be calculated by the following:
The adjustment range in high band is ±160 kHz and in low band it is ±80 kHz. For example to compute an
offset of +50 kHz in high band mode fo[9:0] should be set to 0A0h. For an offset of –50 kHz in high band
mode the fo[9:0] register should be set to 360h.
23.3.7. Automatic Frequency Control (AFC)
All AFC settings can be easily obtained from the settings calculator. This is the recommended method to
program all AFC settings. This section is intended to describe the operation of the AFC in more detail to
help understand the trade-offs of using AFC.The receiver supports automatic frequency control (AFC) to
compensate for frequency differences between the transmitter and receiver reference frequencies. These
differences can be caused by the absolute accuracy and temperature dependencies of the reference crys-
tals. Due to frequency offset compensation in the modem, the receiver is tolerant to frequency offsets up to
0.25 times the IF bandwidth when the AFC is disabled. When the AFC is enabled, the received signal will
be centered in the pass-band of the IF filter, providing optimal sensitivity and selectivity over a wider range
of frequency offsets up to 0.35 times the IF bandwidth. The trade-off of receiver sensitivity (at 1% PER)
versus carrier offset and the impact of AFC are illustrated in Figure 23.5.
71
72
73
74
R/W
R/W
R/W
R/W
Frequency Devia-
Modulation Mode
Frequency Offset
Frequency Offset
Description
Description
Function/
Function/
Control 2
tion
DesiredOff
trclk[1] trclk[0] dtmod[1] dtmod[0] eninv fd[8] modtyp[1] modtyp[0]
fd[7]
D7
fo[7]
D7
fo
[
fd[6]
: 9
set
D6
] 0
fo[6]
D6
156
156
fd[5]
D5
.
Rev. 1.0
25
.
DesiredOff
25
fo[5]
Hz
D5
Hz
fd[4]
D4
(
hbsel
(
hbsel
fo[4]
D4
set
fd[3]
D3
) 1
) 1
fo[3]
fd[2]
D3
fo
D2
Si1000/1/2/3/4/5
[
: 9
] 0
fd[1]
D1
fo[2]
D2
fo[1]
fo[9]
D1
fd[0]
D0
fo[0]
fo[8]
D0
POR Def.
00h
20h
POR
Def.
00h
00h
249
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