MFRC52301HN1,151 NXP Semiconductors, MFRC52301HN1,151 Datasheet - Page 54

• Manufacturer Part Number: MFRC52301HN1,151
• Description: IC MIFARE READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52301HN1,151

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Current: 7 mA
• Operating Voltage: 2.5 V to 3.6 V
• Product: RFID Readers
• Wireless Frequency: 13.56 MHz
• Interface Type: RS-232, I2C
• Data Rate: 100 Kbps
• Operating Temperature Range: - 25 C to +85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4766; 935282956151; MFRC52301HN1

NXP Semiconductors
MFRC523_34
Product data sheet
PUBLIC
9.2.3.1 Reserved register 20h
9.2.3.2 CRCResultReg registers
9.2.3 Page 2: Configuration
Functionality is reserved for future use.
Table 84.
Table 85.
Shows the MSB and LSB values of the CRC calculation.
Remark: The CRC is split into two 8-bit registers.
Table 86.
Table 87.
Table 88.
Table 89.
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Bit
7 to 0
Symbol
CRCResultLSB[7:0] shows the value of the least significant byte of the CRCResultReg
Symbol
reserved
Symbol
CRCResultMSB[7:0] shows the value of the CRCResultReg register’s most
Reserved register (address 20h); reset value: 00h bit allocation
Reserved register bit descriptions
CRCResultReg (higher bits) register (address 21h); reset value: FFh bit allocation
CRCResultReg register higher bit descriptions
CRCResultReg (lower bits) register (address 22h); reset value: FFh bit allocation
CRCResultReg register lower bit descriptions
7
7
7
All information provided in this document is subject to legal disclaimers.
Rev. 3.5 — 24 September 2010
6
6
6
Description
reserved for future use
Description
register. Only valid if Status1Reg register’s CRCReady bit is set to
logic 1
115235
Description
significant byte. Only valid if Status1Reg register’s CRCReady
bit is set to logic 1
5
5
5
CRCResultMSB[7:0]
CRCResultLSB[7:0]
4
4
4
reserved
R
R
-
3
3
3
2
2
2
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
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