XR18W750IL48-F Exar Corporation, XR18W750IL48-F Datasheet - Page 12

• Manufacturer Part Number: XR18W750IL48-F
• Description: IC WIRELESS UART CTRLR 48QFN
• Manufacturer: Exar Corporation

Specifications of XR18W750IL48-F

• Package / Case: 48-VFQFN Exposed Pad
• Function: Controller
• Rf Type: General Purpose
• Secondary Attributes: I²C Interface
• Processor Series: XR18W750
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 400 KHz
• Number Of Timers: 1
• Operating Supply Voltage: 2.25 V to 3.63 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: XR18W750/753-0A-EB, XR18W750/753-0B-EB
• Minimum Operating Temperature: - 40 C
• Program Memory Type: EEPROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR18W750
WIRELESS UART CONTROLLER
The INT interrupt output changes according to the operating mode and enhanced features setup.
and 5
mode, the IRQ# output is the opposite polarity of the INT output. Also see Figures
The enhanced UART has a programmable Baud Rate Generator (BRG) for the transmitter and receiver. The
divisor values for the specific data rates are given in the table below.
The transmitter section comprises of an 8-bit Transmit Shift Register (TSR) and 64 bytes of FIFO which
includes a byte-wide Transmit Holding Register (THR). TSR shifts out every data bit with the 16X internal
clock. A bit time is 16 clock periods. The transmitter sends the start-bit followed by the number of data bits,
inserts the proper parity-bit if enabled, and adds the stop-bit(s). The status of the FIFO and TSR are reported in
the Line Status Register (LSR bit-5 and bit-6).
3.7
3.8
3.9
3.9.1
INT Pin
INT Pin
summarize the operating behavior for the transmitter and receiver. When operating in the Motorola bus
INT (IRQ#) Output
Programmable Baud Rate Generator
Transmitter
Transmit Holding Register (THR) - Write Only
LOW = a byte in THR
HIGH = THR empty
LOW = no data
HIGH = 1 byte
(FIFO D
(FIFO D
FCR B
FCR B
Data Rate
230400
115200
19200
38400
57600
2400
4800
9600
300
600
IT
ISABLED
T
IT
ISABLED
ABLE
-0 = 0
T
-0 = 0
ABLE
4: INT P
)
)
5: INT P
D
T
IVISOR FOR
ABLE
(Decimal)
3333.333
1666.667
416.667
208.333
104.167
52.083
26.042
17.361
Clock
8.681
IN
LOW = FIFO below trigger level
HIGH = FIFO above trigger level
4
6: UART D
LOW = FIFO above trigger level
HIGH = FIFO below trigger level or FIFO empty
IN
O
O
PERATION FOR
16x
PERATION
12
DLM V
ATA
(HEX)
0D
06
01
00
00
00
00
00
00
00
F
R
OR
ALUE
ATES
FCR B
T
RANSMITTER
R
ECEIVER
(FIFO E
IT
FCR B
-0 = 1 (FIFO E
DLL V
(HEX)
IT
A0
D0
1A
NABLED
05
82
68
34
11
8
4
-0 = 1
ALUE
16
)
NABLED
through 21.
)
REV. 1.0.0
Table 4