XR18W750IL48-F Exar Corporation, XR18W750IL48-F Datasheet - Page 17

• Manufacturer Part Number: XR18W750IL48-F
• Description: IC WIRELESS UART CTRLR 48QFN
• Manufacturer: Exar Corporation

Specifications of XR18W750IL48-F

• Package / Case: 48-VFQFN Exposed Pad
• Function: Controller
• Rf Type: General Purpose
• Secondary Attributes: I²C Interface
• Processor Series: XR18W750
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 400 KHz
• Number Of Timers: 1
• Operating Supply Voltage: 2.25 V to 3.63 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: XR18W750/753-0A-EB, XR18W750/753-0B-EB
• Minimum Operating Temperature: - 40 C
• Program Memory Type: EEPROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REV. 1.0.0
The enhanced UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 10
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR# CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, Auto RTS/CTS flow control is not supported during
internal loopback.
3.14
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
10. I
NTERNAL
L
Transmit Shift Register
Receive Shift Register
OOPBACK
(RHR/FIFO)
(THR/FIFO)
RTS#
CTS#
DTR#
DSR#
CD#
RI#
17
M CR bit-4=1
VCC
OP2#
OP1#
VCC
VCC
WIRELESS UART CONTROLLER
TX
RX
RTS#
CTS#
DTR#
DSR#
RI#
CD#
XR18W750