ATMEGA128A-MN Atmel, ATMEGA128A-MN Datasheet - Page 17
![IC MCU AVR 128K FLASH 64VQFN](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA128A-MN
Manufacturer Part Number
ATMEGA128A-MN
Description
IC MCU AVR 128K FLASH 64VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 17 of 386
- Download datasheet (8Mb)
6.8.1
8151H–AVR–02/11
Interrupt Response Time
The interrupt execution response for all the enabled Atmel
minimum. After four clock cycles, the program vector address for the actual interrupt handling
routine is executed. During this 4-clock cycle period, the Program Counter is pushed onto the
Stack. The vector is normally a jump to the interrupt routine, and this jump takes three clock
cycles. If an interrupt occurs during execution of a multi-cycle instruction, this instruction is com-
pleted before the interrupt is served. If an interrupt occurs when the MCU is in Sleep mode, the
interrupt execution response time is increased by four clock cycles. This increase comes in addi-
tion to the start-up time from the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these 4-clock cycles,
the Program Counter (two bytes) is popped back from the Stack, the Stack Pointer is incre-
mented by two, and the I-bit in SREG is set.
Assembly Code Example
C Code Example
sei
sleep; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
__enable_interrupt(); /* set global interrupt enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
; set global interrupt enable
®
AVR
®
interrupts is four clock cycles
ATmega128A
17
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