ATMEGA128A-MN Atmel, ATMEGA128A-MN Datasheet - Page 74
![IC MCU AVR 128K FLASH 64VQFN](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA128A-MN
Manufacturer Part Number
ATMEGA128A-MN
Description
IC MCU AVR 128K FLASH 64VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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12.3.2
8151H–AVR–02/11
Alternate Functions of Port B
Table 12-4.
The Port B pins with alternate functions are shown in
Table 12-5.
Note:
The alternate pin configuration is as follows:
• OC2/OC1C, Bit 7
OC2, Output Compare Match output: The PB7 pin can serve as an external output for the
Timer/Counter2 Output Compare. The pin has to be configured as an output (DDB7 set “one”) to
serve this function. The OC2 pin is also the output pin for the PWM mode timer function.
OC1C, Output Compare Match C output: The PB7 pin can serve as an external output for the
Timer/Counter1 Output Compare C. The pin has to be configured as an output (DDB7 set (one))
to serve this function. The OC1C pin is also the output pin for the PWM mode timer function.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
1. OC1C not applicable in ATmega103 compatibility mode.
PA3/AD3
SRE
~(WR | ADA) •
PORTA3 • PUD
SRE
WR | ADA
SRE
A3 • ADA | D3
OUTPUT • WR
0
0
D3 INPUT
–
Alternate Functions
OC2/OC1C
and PWM Output C for Timer/Counter1)
OC1B (Output Compare and PWM Output B for Timer/Counter1)
OC1A (Output Compare and PWM Output A for Timer/Counter1)
OC0 (Output Compare and PWM Output for Timer/Counter0)
MISO (SPI Bus Master Input/Slave Output)
MOSI (SPI Bus Master Output/Slave Input)
SCK (SPI Bus Serial Clock)
SS (SPI Slave Select input)
Overriding Signals for Alternate Functions in PA3:PA0
Port B Pins Alternate Functions
(1)
(Output Compare and PWM Output for Timer/Counter2 or Output Compare
PA2/AD2
SRE
~(WR | ADA) •
PORTA2 • PUD
SRE
WR | ADA
SRE
A2• ADA | D2
OUTPUT • WR
0
0
D2 INPUT
–
Table
PA1/AD1
SRE
~(WR | ADA) •
PORTA1 • PUD
SRE
WR | ADA
SRE
A1 • ADA | D1
OUTPUT • WR
0
0
D1 INPUT
–
12-5.
ATmega128A
PA0/AD0
~(WR | ADA) •
PORTA0 • PUD
SRE
WR | ADA
A0 • ADA | D0
OUTPUT • WR
0
0
D0 INPUT
–
SRE
SRE
74
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