ATMEGA649V-8AUR Atmel, ATMEGA649V-8AUR Datasheet - Page 97
![IC AVR MCU FLASH 64K 1.8V 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA649V-8AUR
Manufacturer Part Number
ATMEGA649V-8AUR
Description
IC AVR MCU FLASH 64K 1.8V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA329-16AU.pdf
(392 pages)
Specifications of ATMEGA649V-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.7
14.7.1
14.7.2
2552K–AVR–04/11
Modes of Operation
Normal Mode
Clear Timer on Compare Match (CTC) Mode
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is
defined by the combination of the Waveform Generation mode (WGM01:0) and Compare Output
mode (COM0A1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM0A1:0 bits control whether the PWM
output generated should be inverted or not (inverted or non-inverted PWM). For non-PWM
modes the COM0A1:0 bits control whether the output should be set, cleared, or toggled at a
compare match
For detailed timing information refer to
in
The simplest mode of operation is the Normal mode (WGM01:0 = 0). In this mode the counting
direction is always up (incrementing), and no counter clear is performed. The counter simply
overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bot-
tom (0x00). In normal operation the Timer/Counter Overflow Flag (TOV0) will be set in the same
timer clock cycle as the TCNT0 becomes zero. The TOV0 Flag in this case behaves like a ninth
bit, except that it is only set, not cleared. However, combined with the timer overflow interrupt
that automatically clears the TOV0 Flag, the timer resolution can be increased by software.
There are no special cases to consider in the Normal mode, a new counter value can be written
anytime.
The Output Compare unit can be used to generate interrupts at some given time. Using the Out-
put Compare to generate waveforms in Normal mode is not recommended, since this will
occupy too much of the CPU time.
In Clear Timer on Compare or CTC mode (WGM01:0 = 2), the OCR0A Register is used to
manipulate the counter resolution. In CTC mode the counter is cleared to zero when the counter
value (TCNT0) matches the OCR0A. The OCR0A defines the top value for the counter, hence
also its resolution. This mode allows greater control of the compare match output frequency. It
also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
increases until a compare match occurs between TCNT0 and OCR0A, and then counter
(TCNT0) is cleared.
“Timer/Counter Timing Diagrams” on page
(See “Compare Match Output Unit” on page
Figure
ATmega329/3290/649/6490
101.
14-8,
Figure
Figure
14-9,
95.).
14-5. The counter value (TCNT0)
Figure 14-10
and
Figure 14-11
97
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