LPC2478-STK Olimex Ltd., LPC2478-STK Datasheet - Page 4

MCU, MPU & DSP Development Tools DEV BRD FOR LPC2478 64MB SDRAM 100MBIT

LPC2478-STK

Manufacturer Part Number
LPC2478-STK
Description
MCU, MPU & DSP Development Tools DEV BRD FOR LPC2478 64MB SDRAM 100MBIT
Manufacturer
Olimex Ltd.
Datasheet

Specifications of LPC2478-STK

Processor To Be Evaluated
LPC2478
Interface Type
RS-232, Ethernet, USB, PS2, CAN, JTAG
Dimensions
134.6 mm x 101.6 mm
Operating Supply Voltage
3.3 V
Tool Type
Development Kit
Core Architecture
ARM
Cpu Core
ARM7TDMI-S
Data Bus Width
32 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1701509 25R4708

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2478-STK-MICTOR
Manufacturer:
Olimex Ltd.
Quantity:
135
Other peripherals:
Single 3.3 V power supply (3.0 V to 3.6 V).
4 MHz internal RC oscillator trimmed to 1 % accuracy that can
optionally be used as the system clock.
Three reduced power modes: idle, sleep, and power-down.
Four external interrupt inputs configurable as edge/level sensitive. All
pins on port 0 and port 2 can be used as edge sensitive interrupt
sources.
Processor wake-up from Power-down mode via any interrupt able to
operate during Power-down mode (includes external interrupts, RTC
interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity,
port 0/2 pin interrupt).
Two independent power needed features.
Each peripheral has its own clock divider for further power saving.
These dividers help reduce active power by 20 % to 30 %.
Brownout detect with separate thresholds for interrupt and forced
reset.
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USB 2.0 full-speed dual-port device/host/OTG controller with
on-chip PHY and associated DMA controller.
Four UARTs with fractional baud rate generation, one with
modem control I/O, one with IrDA support, all with FIFO.
CAN controller with two channels.
SPI controller.
Two SSP controllers, with FIFO and multi-protocol capabilities.
One is an alternate for the SPI port, sharing its interrupt. SSPs
can be used with the GPDMA controller.
Three I2C-bus interfaces (one with open-drain and two with
standard port pins).
I2S (Inter-IC Sound) interface for digital audio input or output. It
can be used with the GPDMA.
SD/MMC memory card interface.
160 General purpose I/O pins with configurable pull-up/down
resistors.
10-bit ADC with input multiplexing among 8 pins.
10-bit DAC.
Four general purpose timers/counters with 8 capture inputs and
10 compare outputs. Each timer block has an external count
input.
Two PWM/timer blocks with support for three-phase motor
control. Each PWM has an external count inputs.
Real-Time Clock (RTC) with separate power domain. Clock
source can be the RTC oscillator or the APB clock.
2 kB SRAM powered from the RTC power pin, allowing data to be
stored when the rest of the chip is powered off.
WatchDog Timer (WDT). The WDT can be clocked from the
internal RC oscillator, the RTC oscillator, or the APB clock.
Page 4

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