WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 39

Audio CODECs Stereo CODEC with 5-Ch Mux

WM8776SEFT/V

Manufacturer Part Number
WM8776SEFT/V
Description
Audio CODECs Stereo CODEC with 5-Ch Mux
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8776SEFT/V

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
ADC INPUT MIXER AND POWERDOWN CONTROL
Register bits AMX[4:0] control the left and right channel inputs into the stereo ADC. The default is
AIN1. One bit of AMX is allocated to each stereo input pair to allow the signals to be mixed before
being digitised by the ADC. For example, if AMX[4:0] is 00101, the input signal to the ADC will be
(AIN1L+AIN3L) on the left channel and (AIN1R+AIN3R) on the right channel.
However if the analogue input buffer is powered down, by setting AINPD, then all 5-channel mixer
inputs are switched to buffered VMIDADC.
Table 16 ADC Input Mixer
Figure 25 ADC Input Mixer
AMX[4:0]
Powerdown Control
00001
00010
00100
01000
10000
AIN2L/R
AIN3L/R
AIN5L/R
ADC Input Mux
AIN1L/R
AIN4L/R
REGISTER
ADDRESS
R13 (0Dh)
R21 (15h)
0010101
0001101
LEFT ADC INPUT
AIN1L
AIN2L
AIN3L
AIN4L
AIN5L
AMX[0]
AMX[1]
AMX[2]
AMX[3]
AMX[4]
BIT
4:0
6
AMX[4:0]
LABEL
AINPD
RIGHT ADC INPUT
AIN1R
AIN2R
AIN3R
AIN4R
AIN5R
DEFAULT
00001
0
ADC left channel input mixer
control bits (see Table 16)
Input mux and buffer powerdown
0: Input mux and buffer
enabled
1: Input mux and buffer
powered down
PD, Rev 4.1, September 2008
DESCRIPTION
WM8776
39

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