WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 9

• Manufacturer Part Number: WM8776SEFT/V
• Description: Audio CODECs Stereo CODEC with 5-Ch Mux
• Manufacturer: Wolfson Microelectronics

Specifications of WM8776SEFT/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
MASTER CLOCK TIMING
Figure 1 Master Clock Timing Requirements
Table 1 Master Clock Timing Requirements
Note:
If MCLK period is longer than maximum specified above, power-saving mode is entered and DACs are powered down with
internal digital audio filters being reset. In this power-saving mode, all registers will retain their values and can be accessed
in the normal manner through the control interface. Once MCLK is restored, the DACs are automatically powered up, but a
write to the volume update register bit is required to restore the correct volume settings.
w
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, AGND, DGND = 0V, T
otherwise stated.
PARAMETER
System Clock Timing Information
ADC/DACMCLK System clock
pulse width high
ADC/DACMCLK System clock
pulse width low
ADC/DACMCLK System clock
cycle time
ADC/DACMCLK Duty cycle
Power-saving mode activated
Normal mode resumed
MCLK
SYMBOL
t
t
t
MCLKH
MCLKL
MCLKY
t
MCLKL
t
MCLKY
After MCLK re-started
After MCLK stopped
TEST CONDITIONS
t
MCLKH
A
= +25
o
C, fs = 48kHz, ADC/DACMCLK = 256fs unless
40:60
MIN
0.5
11
11
28
2
TYP
PD, Rev 4.1, September 2008
60:40
1000
MAX
10
1
WM8776
MCLK
UNIT
cycle
ns
ns
ns
µs
9