A3P250L-VQG100 Actel, A3P250L-VQG100 Datasheet - Page 75

FPGA - Field Programmable Gate Array 2.5K SYSTEM GATES

A3P250L-VQG100

Manufacturer Part Number
A3P250L-VQG100
Description
FPGA - Field Programmable Gate Array 2.5K SYSTEM GATES
Manufacturer
Actel
Datasheet

Specifications of A3P250L-VQG100

Processor Series
A3P250
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
68
Data Ram Size
36864
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
250 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3P250L-VQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3P250L-VQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-90 • 1.8 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Table 2-91 • 1.8 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Speed
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Speed
Grade
Grade
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
–1
–1
–1
–1
–1
–1
–1
–1
–1
–1
–1
–1
t
t
DOUT
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
DOUT
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
0.70
0.60
7.77
6.61
6.38
5.43
5.48
4.66
5.17
4.40
5.06
4.30
5.06
4.30
3.60
3.06
2.81
2.39
2.47
2.10
2.40
2.04
2.39
2.04
2.39
2.04
t
t
DP
DP
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
0.05
0.04
t
t
DIN
DIN
1.18
1.00
1.18
1.00
1.18
1.00
1.18
1.00
1.18
1.00
1.18
1.00
1.10
0.93
1.10
0.93
1.10
0.93
1.10
0.93
1.10
0.93
1.10
0.93
t
t
J
J
PY
PY
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
t
t
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
0.50
0.43
EOUT
EOUT
R e v i s i o n 9
7.92
6.73
6.50
5.53
5.58
4.75
5.26
4.48
5.15
4.38
5.15
4.38
3.66
3.12
2.87
2.44
2.51
2.14
2.45
2.08
2.44
2.08
2.44
2.08
t
t
ZL
ZL
Table 2-6 on page 2-7
Table 2-6 on page 2-7
6.80
5.78
5.78
4.91
5.11
4.35
4.97
4.23
5.03
4.28
5.03
4.28
3.52
3.00
2.64
2.25
2.21
1.88
2.13
1.81
2.04
1.73
2.04
1.73
t
t
ZH
ZH
2.50
2.13
2.91
2.47
3.18
2.71
3.24
2.76
3.34
2.84
3.34
2.84
2.49
2.12
2.90
2.47
3.18
2.70
3.24
2.76
3.33
2.83
3.33
2.83
t
t
LZ
LZ
ProASIC3L Low Power Flash FPGAs
1.44
1.22
2.46
2.09
2.94
2.51
3.07
2.61
3.55
3.02
3.55
3.02
1.49
1.27
2.55
2.17
3.04
2.59
3.17
2.70
3.67
3.12
3.67
3.12
t
t
HZ
HZ
for derating values.
for derating values.
9.93
8.45
8.51
7.24
7.59
6.46
7.27
6.19
7.17
6.10
7.17
6.10
5.68
4.83
4.88
4.15
4.53
3.85
4.46
3.79
4.45
3.79
4.45
3.79
t
t
ZLS
ZLS
t
8.81
7.49
7.79
6.63
7.12
6.06
6.98
5.94
7.04
5.99
7.04
5.99
t
5.53
4.71
4.65
3.96
4.22
3.59
4.14
3.52
4.05
3.45
4.05
3.45
ZHS
ZHS
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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