STM8L152C4T6TR STMicroelectronics, STM8L152C4T6TR Datasheet - Page 15
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STM8L152C4T6TR
Manufacturer Part Number
STM8L152C4T6TR
Description
IC MCU 8BIT 16KB FLASH 48LQFP
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet
1.STM8L151C4T6.pdf
(122 pages)
Specifications of STM8L152C4T6TR
Featured Product
STM32 Cortex-M3 Companion Products
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, LCD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 25x12b, D/A 1x12
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Core
STM8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L152C4T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM8L151xx, STM8L152xx
3.2.2
Architecture and registers
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Addressing
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Instruction set
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Interrupt controller
The medium density STM8L15x features a nested vectored interrupt controller:
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Harvard architecture
3-stage pipeline
32-bit wide program memory bus - single cycle fetching most instructions
X and Y 16-bit index registers - enabling indexed addressing modes with or without
offset and read-modify-write type data manipulations
8-bit accumulator
24-bit program counter - 16 Mbyte linear memory space
16-bit stack pointer - access to a 64 Kbyte level stack
8-bit condition code register - 7 condition flags for the result of the last instruction
20 addressing modes
Indexed indirect addressing mode for lookup tables located anywhere in the address
space
Stack pointer relative addressing mode for local variables and parameter passing
80 instructions with 2-byte average instruction size
Standard data movement and logic/arithmetic functions
8-bit by 8-bit multiplication
16-bit by 8-bit and 16-bit by 16-bit division
Bit manipulation
Data transfer between stack and accumulator (push/pop) with direct stack access
Data transfer using the X and Y registers or direct memory-to-memory transfers
Nested interrupts with 3 software priority levels
32 interrupt vectors with hardware priority
Up to 40 external interrupt sources on 11 vectors
Trap and reset interrupts
Doc ID 15962 Rev 6
Functional overview
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