STM32F100RCT6TR STMicroelectronics, STM32F100RCT6TR Datasheet - Page 59

• Manufacturer Part Number: STM32F100RCT6TR
• Description: IC ARM CORTEX MCU 256KB 64LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F100RCT6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LFQFP
• Core: ARM Cortex M3
• For Use With: STM32100B-EVAL - EVAL BOARD FOR STM32F100VBT6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

STM32F100xC, STM32F100xD, STM32F100xE
Figure 18. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 33.
1. C
2. Preliminary values.
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NWE_NE)
w(NWE)
h(NE_NWE)
v(A_NE)
v(NADV_NE)
w(NADV)
h(AD_NADV)
h(A_NWE)
v(BL_NE)
h(BL_NWE)
v(Data_NADV)
h(Data_NWE)
Symbol
L
= 15 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
FSMC_NADV
FSMC_NWE
FSMC_NOE
FSMC_NEx
Asynchronous multiplexed PSRAM/NOR write timings
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low time
FSMC_NWE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD (address) valid hold time after
FSMC_NADV high
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE high
FSMC_NADV high to Data valid
Data hold time after FSMC_NWE high
Doc ID 15081 Rev 5
Parameter
t
v(NADV_NE)
t
t
t
v(A_NE)
v(A_NE)
t
t
v(NWE_NE)
v(BL_NE)
w(NADV)
Address
Address
t
t
t
v(Data_NADV)
w(NE)
h(AD_NADV)
NBL
t
w(NWE)
t
h(BL_NWE)
t
h(A_NWE)
Data
5T
2T
2T
T
3
T
T
4T
T
T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
Min
Electrical characteristics
– 1
– 1
– 3
– 1.5
– 5
– 1
– 1
(1)(2)
t
5T
2T
2T
7
5
T
1.6
T
h(Data_NWE)
t
HCLK
HCLK
h(NE_NWE)
HCLK
HCLK
HCLK
Max
+ 1
+ 1.5
+ 2
+ 1
+ 2
ai14891B
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
59/97