D2-45057-QR-T Intersil, D2-45057-QR-T Datasheet - Page 4

• Manufacturer Part Number: D2-45057-QR-T
• Description: IC DGTL AMP PWM CTRLR 68QFN
• Manufacturer: Intersil
• Series: D2Audio™r
• Type: Class Dr

Specifications of D2-45057-QR-T

• Output Type: 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 30W x 1 @ 8 Ohm
• Voltage - Supply: 9 V ~ 26 V
• Mounting Type: Surface Mount
• Package / Case: 68-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Absolute Maximum Ratings
Supply Voltage
Input Voltage
Input Current, Any Pin but Supplies . . . . . . . . . . . . . ±10mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
Electrical Specifications
±10%. All grounds at 0.0V. All voltages referenced to ground. PLL at 294.912MHz, OSC at 24.576MHz, core running at
147.456MHz with typical audio data traffic.
Digital Input High Logic Level (Note 8)
Digital Input Low Logic Level (Note 8)
High Level Output Drive Voltage
(I
Low Level Output Drive Voltage
(I
High Level Input Drive Voltage XTALI Pin
Low Level Input Drive Voltage XTALI Pin
Input Leakage Current (Note 9)
Input Capacitance
Output Capacitance
nRESET Pulse Width
Internal Pull-Up Resistance to PWMVDD
(for nERROR0-3, OCFG, nPDN)
Digital I/O Supply Pin Voltage, Current
Core Supply Pins
5. θ
6. For θ
7. Absolute Maximum parameters are not tested in production.
HVDD[A:D], VDDHV. . . . . . . . . . . . . . . . -0.3V to +28.0V
RVDD, PWMVDD . . . . . . . . . . . . . . . . . . . . -0.3V to 4.0V
CVDD, PLLVDD . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.4V
Any Input but XTALI . . . . . . . . . . . . -0.3V to RVDD +0.3V
XTALI . . . . . . . . . . . . . . . . . . . . . -0.3V to PLLVDD +0.3V
OUT
OUT
features. See Tech Brief TB379.
JA
at -Pin Drive Strength Current)
at +Pin Drive Strength Current)
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
PARAMETER
4
T
A
= +25°C, HVDD[A:D]/VDDHV = 24V, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V
D2-45057, D2-45157
All Outputs Except
OUT[A:D]
OUT[A:D]
Active Current
Power-Down Current
Active Current
Power-Down Current
(Note 10)
CONDITIONS
TEST
Thermal Information
Thermal Resistance (Typical)
Maximum Storage Temperature . . . . . . . . -55°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . .-10°C to +85°C
High Voltage Supply Voltage,
Digital I/O Supply Voltage, PWMVDD . . . . . . . . . . . . . . 3.3V
Core Supply Voltage, CVDD . . . . . . . . . . . . . . . . . . . . 1.8V
Analog Supply Voltage, PLLVDD . . . . . . . . . . . . . . . . . 1.8V
Minimum Load Impedance (HVDD[A:D]
68 Ld QFN Package (Notes 5, 6) . .
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
HVDD[A:D], VDDHV . . . . . . . . . . . . . . . . . . 9.0V to 26.5V
SYMBOL
PWMVDD
RVDD
CVDD
V
Cout
V
t
V
V
and
V
V
Cin
I
RST
IHX
ILX
OH
OL
IN
IH
-
IL
RVDD - 0.4
MIN
0.7
1.7
2
3
-
-
-
-
-
-
-
-
-
-
-
-
-
θ
JA
TYP
0.01
190
100
300
3.3
1.8
10
10
≤
9
9
6
-
-
-
-
-
-
-
(°C/W) θ
24.0V), Z
25
PLLVDD
MAX
±10
0.8
0.4
0.3
3.6
1.9
-
-
-
-
-
-
-
-
-
-
-
JC
L
July 29, 2010
. . . . 4Ω
(°C/W)
FN6785.0
1
UNIT
mA
mA
mA
mA
kΩ
µA
pF
pF
pF
ns
V
V
V
V
V
V
V
V