X28HC64J-12 Intersil, X28HC64J-12 Datasheet
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X28HC64J-12
Specifications of X28HC64J-12
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X28HC64J-12 Summary of contents
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... Data Sheet 5 Volt, Byte Alterable EEPROM The X28HC64 EEPROM, fabricated with Intersil’s proprietary, high performance, floating gate CMOS technology. Like all Intersil programmable nonvolatile memories, the X28HC64 only device. It features the JEDEC approved pinout for byte-wide memories, compatible with industry standard RAMs. ...
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... X28HC64P-90 X28HC64PI-90 RR X28HC64PI-90 X28HC64PIZ-90 (Notes 1, 2) X28HC64PI-90 RRZ X28HC64PZ-90 (Notes 1, 2) X28HC64P-90 RRZ X28HC64J-12* X28HC64J-12 RR X28HC64JI-12* X28HC64JI-12 RR X28HC64JIZ-12* (Note 1) X28HC64JI- X28HC64JZ-12* (Note 1) X28HC64J-12 RRZ X28HC64P-12 X28HC64P-12 RR X28HC64PI-12 X28HC64PI-12 RR X28HC64PIZ-12 (Notes 1, 2) X28HC64PI-12 RRZ X28HC64PZ-12 (Notes 1, 2) X28HC64P-12 RRZ , X28HC64S-12* ** X28HC64S-12 RR X28HC64SI-12* ...
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... Page Write Operation The page write feature of the X28HC64 allows the entire memory to be written in 0.25 seconds. Page write allows two to sixty-four bytes of data to be consecutively written to the DESCRIPTION X28HC64 prior to the commencement of the internal Address Inputs programming cycle ...
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DATA Polling (I The X28HC64 features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the ...
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... Software Data Protection The X28HC64 offers a software controlled data protection feature. The X28HC64 is shipped from Intersil with the software data protection NOT ENABLED; that is, the device will be in the standard operating mode. In this mode data should be protected during power-up/-down operations through the use of external circuits ...
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Software Data Protection DATA AAA ADDR 1555 CE WE WRITE DATA AA TO ADDRESS 1555 WRITE DATA 55 TO ADDRESS 0AAA WRITE DATA A0 TO ADDRESS 1555 BYTE/PAGE LOAD ENABLED WRITE DATA XX TO ANY ADDRESS OPTIONAL ...
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Resetting Software Data Protection V CC AAA DATA 1555 0AAA ADDR CE WE FIGURE 8. RESET SOFTWARE DATA PROTECTION TIMING SEQUENCE WRITE DATA AA TO ADDRESS 1555 WRITE DATA 55 TO ADDRESS 0AAA WRITE DATA 80 TO ADDRESS 1555 WRITE ...
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... X28HC64 Because the X28HC64 has two power modes, standby and active, proper decoupling of the memory array is of prime concern. Enabling CE will cause transient current spikes. The magnitude of these spikes is dependent on the output capacitive loading of the I/Os. Therefore, the larger the array sharing a common bus, the larger the transient spikes ...
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... Data Retention 9 X28HC64 Thermal Information Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Recommended Operating Conditions Commercial Temperature Range 0°C to +70°C Industrial Temperature Range . . . . . . . . . . . . . . . . . .-40° ...
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Power-up Timing Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. PARAMETER Power-up to Read Operation (Note 5) Power-up to Write Operation (Note 5) Capacitance ...
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AC Electrical Specifications Read Cycle Limits Over the recommended operating conditions unless otherwise specified. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. PARAMETER Read ...
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Write Cycle Limits Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. PARAMETER Write Cycle Time (Note 7) Address Setup Time Address Hold Time Write ...
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... Between successive byte writes within a page write operation, OE can be strobed LOW: e.g. this can be done with CE and WE HIGH to fetch data from another memory device within the system for the next write; or with WE HIGH and CE LOW effectively performing a polling operation. 10. The timings shown above are unique to page write operations. Individual byte load operations within the page write must conform to either the controlled write cycle timing ...
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DATA Polling Timing Diagram (Note 11) ADDRESS OEH I Toggle Bit Timing Diagram (Note 11 OEH OE HIGH Z I/ I/O NOTE: 11. ...
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Plastic Leaded Chip Carrier Packages (PLCC) 0.042 (1.07) PIN (1) 0.056 (1.42) 0.042 (1.07) IDENTIFIER 0.050 (1.27) TP 0.048 (1.22 0.020 (0.51) MAX 3 PLCS 0.050 (1.27) MIN 0.025 (0.64) MIN VIEW ...
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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...