PC28F128P30B85E NUMONYX, PC28F128P30B85E Datasheet - Page 26

• Manufacturer Part Number: PC28F128P30B85E
• Description: IC FLASH 128MBIT 85NS 64EZBGA
• Manufacturer: NUMONYX
• Series: StrataFlash™r

Specifications of PC28F128P30B85E

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (8Mx16)
• Speed: 85ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 887046; 887046; PC28F128P30B85 S L9YQ

Table 12: Command Bus Cycles
Datasheet
26
Configuration
Notes:
1.
2.
3.
4.
OTP Register
Unlocking
Locking/
Program
Suspend
Mode
Erase
Block
Read
First command cycle address should be the same as the operation’s target address.
DBA = Device Base Address (NOTE: needed for dual-die 512 Mb device)
DnA = Address within the device.
IA = Identification code address offset.
CFI-A = Read CFI address offset.
WA = Word address of memory location to be written.
BA = Address within the block.
OTP-RA = Protection Register address.
LRA = Lock Register address.
RCD = Read Configuration Register data on QUAD+ A[15:0] or EASY BGA A[16:1].
ID = Identifier data.
CFI-D = CFI data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
OTP-D = Protection Register data.
LRD = Lock Register data.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to 32 words of data.Then the confirm command (0xD0) is issued, triggering the array programming
operation.
The confirm command (0xD0) is followed by the buffer data.
Read Array
Read Device Identifier
Read CFI
Read Status Register
Clear Status Register
Word Program
Buffered Program
Buffered Enhanced Factory
Program (BEFP)
Block Erase
Program/Erase Suspend
Program/Erase Resume
Lock Block
Unlock Block
Lock-down Block
Program OTP Register
Program Lock Register
Program Read Configuration
Register
Command
(4)
(3)
Cycles
Bus
≥ 2
≥ 2
> 2
> 2
1
2
1
2
2
1
1
2
2
2
2
2
2
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Addr
RCD
DnA
DnA
DnA
DnA
DnA
DnA
DnA
PRA
LRA
WA
WA
WA
BA
BA
BA
BA
(1)
Data
0x40/
0x90
0x98
0x70
0x50
0x10
0xE8
0x80
0x20
0xB0
0xD0
0x60
0x60
0x60
0xC0
0xC0
0x60
0xFF
(2)
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
-
-
-
-
Second Bus Cycle
DBA + CFI-
DBA + IA
Addr
OTP-RA
DnA
RCD
LRA
WA
WA
WA
BA
BA
BA
BA
A
-
-
-
-
(1)
August 2008
306666-12
Data
OTP-D
CFI-D
N - 1
0xD0
0xD0
0xD0
0x01
0x2F
0x03
SRD
LRD
WD
ID
-
-
-
-
(2)
P30