PM6652 STMicroelectronics, PM6652 Datasheet - Page 33

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PM6652

Manufacturer Part Number
PM6652
Description
IC CTLR STEPDOWN SMPS 32VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6652

Applications
Controller, Intel IMVP-6.5™, VR11
Voltage - Input
4.5 V ~ 36 V
Number Of Outputs
1
Voltage - Output
0.3 V ~ 1.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PM6652
8.8
RA//RB1, and the resultant voltage drop is found on the VCORE output voltage, in
agreement with
Equation 13
The result is an output voltage drop also at no load.
In order to avoid this no-load voltage drop condition, the current sensing filter equivalent
resistance, i.e. RA//RB1, should fall in the range 1 kΩ÷10 kΩ.
Figure 33. Thermal compensation network
Soft-start and soft-end
The DAC voltage slew-rate at start-up can be decreased, in order to limit the inrush current,
in GFX and VR11 supply mode. A soft-start capacitor C
SGND is charged and discharged with 50 µA (only at start-up). The resultant soft-start
capacitor voltage variation is exploited by the internal DAC to ramp-up to the VIDs
programmed value (in GFX mode) or to VBOOT default voltage (in VR11 mode), with
12.5 mV steps.
If the SSTART pin is connected to SVCC, the VDAC ramp-up (and VOUT output voltage too)
is performed with minimum 5mV/µs voltage slew-rate. This function is performed in CPU
IMVP6.5 mode only.
Figure 34
mode, assuming the following typical values for timing:
TON =350 µs;
TSTART depends on the soft-start programmed slew-rate and voltage; for CPU mode,
the soft-start slew-rate is 6.25 mV/µs (typ.) and VBOOT = 1.1 V so TSTART = 176 µs
typ.
TBOOT = 70 µs
TPG = 4ms
and
Figure 35
Figure 36
Equation 7
show the different soft-start mechanism for GFX mode and CPU
shows the soft-start VDAC voltage slew-rate vs CSS capacitance.
.
Doc ID 16867 Rev 3
V
LKG
=
I
LKG
R
A
//
R
B
SS
1
placed between SSTART pin and
Device description
33/53

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