PM6652 STMicroelectronics, PM6652 Datasheet - Page 41

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PM6652

Manufacturer Part Number
PM6652
Description
IC CTLR STEPDOWN SMPS 32VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6652

Applications
Controller, Intel IMVP-6.5™, VR11
Voltage - Input
4.5 V ~ 36 V
Number Of Outputs
1
Voltage - Output
0.3 V ~ 1.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PM6652
8.11
8.11.1
δ
G
V
=
CORE
G
D
,
STAT
G
SNS
=
System accuracy
VCORE accuracy
Starting from
Equation 23
The statistical variation of the output voltage is given by the following equation:
Equation 24
Based on
Equation 25
The same mathematical approach provides with the following computation, based on
Equation 11
(
δ
VDAC is the internal reference voltage, i.e. the digital-to-analog converter output
programmed by the 7 VIDs;
G
G
NTC thermal compensation network, typically used in DCR current sensing technique;
R
V
δ
(refer to
δ
used. This two elements are only influenced by external components;
δ
due to its accuracy;
δ
V
G
R
V
DAC
SNS
D
SNS
OFFSET
DAC
SNS
D
is the droop gain, given by Equation 8;
/G
) (
Equation 7
2
is the current sensing filter attenuation. This element is lower than 1 if there is an
is the current sensing element, i.e. the inductor DCR or the precision resistor;
D
is the internal reference voltage error, lower than 0.7% of the programmed VID
+
is the current sensing element (inductor's DCR or precision resistor) variation
:
Figure 5 on page 13
and
Equation 7
G
< 2.5 mV is the PM6652 integrator maximum offset.
R
δ
SNS
G
V
SNS
CC
the droop gain statistical error is:
I
_
OUT
/G
SNS
and
SNS
)
2
G
δ
Equation 9
G
Doc ID 16867 Rev 3
G
V
D
are the statistical error of the droop gain and NTC network, if
D
⎛ δ
⎜ ⎜
SS
D
=
);
G
=
_
G
1
D
SNS
+
D
G
R
R
⎟ ⎟
G
D
2
2
1
D
=
, the programmed output voltage is given by:
+
1
V
⎛ δ
DAC
G
⎛ δ
⎜ ⎜
G
SNS
R
SNS
R
2
2
G
⎟ ⎟
D
2
2
+
G
+
⎛ δ
⎜ ⎜
SNS
(
R
G
R
1
1
I
(
OUT
⎟ ⎟
R
2
SNS
δ ⋅
R
I
OUT
SNS
)
) (
Device description
2
+
G
D
δ ⋅
V
OFFSET
41/53
)
2

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