AX5043-QFN28-TU AXSEM, AX5043-QFN28-TU Datasheet - Page 25

RF Transceiver Narrow-Band-IC

AX5043-QFN28-TU

Manufacturer Part Number
AX5043-QFN28-TU
Description
RF Transceiver Narrow-Band-IC
Manufacturer
AXSEM
Datasheet

Specifications of AX5043-QFN28-TU

Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
70 MHz to 1050 MHz
Interface Type
SPI
Output Power
18 dBm to 22 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Maximum Supply Current
60 mA
Minimum Operating Temperature
- 40 C
Modulation
ASK, FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.5.
The SYSCLK pin outputs either the reference clock signal divided by a programmable integer or the
low power oscillator clock. Divisions from 1 to 1024 are possible. For divider ratios > 1 the duty
cycle is 50%. Bits SYSCLK[4:0] in the
output can be disabled.
After power-up SYSCLK outputs 1/16 of the crystal oscillator clock, making it possible to use this
clock to boot a micro-controller.
5.6.
AX5043
After POR, the
setting followed by resetting the bit RST in the
After POR or reset all registers are set to their default values.
5.7.
The RF frequency generation subsystem consists of a fully integrated synthesizer, which multiplies
the reference frequency from the crystal oscillator to get the desired RF frequency. The advanced
architecture of the synthesizer enables frequency resolutions of 1 Hz, as well as fast settling times
of 5 – 50 µs depending on the settings (see section 4.3: AC Characteristics). Fast settling times
mean fast start-up and fast RX/TX switching, this enables low-power system design.
For receive operation the RF frequency is fed to the mixer, for transmit operation to the power-
amplifier.
Version 0.2
SYSCLK Output
Power-on-reset (POR)
RF Frequency Generation Subsystem
has an integrated power-on-reset block. No external POR circuit is required.
AX5043
can be reset by first setting the SPI SEL pin to high for at least 100ns, then
PINFUNCSYSCLK
Figure 5 GPIO pin
Preliminary
PWRMODE
register set the divider ratio. The SYSCLK
register.
Circuit Description
Datasheet AX5043
25

Related parts for AX5043-QFN28-TU