LIS302DLTR STMicroelectronics, LIS302DLTR Datasheet - Page 21
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LIS302DLTR
Manufacturer Part Number
LIS302DLTR
Description
ACCELEROMETER 3AXIS MEMS 14-LGA
Manufacturer
STMicroelectronics
Datasheet
1.STEVAL-MKI006V1.pdf
(42 pages)
Specifications of LIS302DLTR
Featured Product
STM32 Cortex-M3 Companion Products
Axis
X, Y, Z
Acceleration Range
±2.3g, 9.2g
Sensitivity
18mg/digit, 72mg/digit
Voltage - Supply
2.16 V ~ 3.6 V
Output Type
Digital
Bandwidth
100Hz ~ 400Hz Selectable
Interface
I²C, SPI
Mounting Type
Surface Mount
Package / Case
14-LGA
Sensing Axis
X, Y, Z
Acceleration
2 g, 8 g
Digital Output - Number Of Bits
8 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.16 V
Supply Current
0.3 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Digital Output - Bus Interface
I2C, SPI
Shutdown
Yes
For Use With
497-9047 - BOARD DEMO ACCELEROMETER DIL24497-8373 - BOARD EVAL EXTENSION SN250497-8204 - BOARD ADAPTER LIS302SG DIL24497-8203 - BOARD DEMO LIS302SG497-6404 - BOARD EVAL SPZB260 MOD FOR STR9497-6342 - BOARD EVALUATION FOR LIS302DL497-6246 - BOARD EVAL ACCELEROM LIS302ALK497-6227 - BOARD ADAPTER 20DIP LIS3LV02DL497-6226 - BOARD EVAL ACCELEROM LIS3LV02DL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5911-2
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LIS302DL
Digital interfaces
Figure 6.
Read & write protocol
CS
SPC
SDI
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
RW
MS
AD5 AD4 AD3 AD2 AD1 AD0
SDO
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
CS is the Serial Port Enable and it is controlled by the SPI master. It goes low at the start of
the transmission and goes back high at the end. SPC is the Serial Port Clock and it is
controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and
SDO are respectively the Serial Port Data Input and Output. Those lines are driven at the
falling edge of SPC and should be captured at the rising edge of SPC.
Both the Read Register and Write Register commands are completed in 16 clock pulses or
in multiple of 8 in case of multiple byte read/write. Bit duration is the time between two falling
edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling edge
of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just before the
rising edge of CS.
bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0)
from the device is read. In latter case, the chip will drive SDO at the start of bit 8.
bit 1: MS bit. When 0, the address will remain unchanged in multiple read/write commands.
When 1, the address will be auto incremented in multiple read/write commands.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that will be written into the device (MSb
first).
bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb
first).
In multiple read/write commands further blocks of 8 clock periods will be added. When MS
bit is 0 the address used to read/write data remains the same for every block. When MS bit
is 1 the address used to read/write data is incremented at every block.
The function and the behavior of SDI and SDO remain unchanged.
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