DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 165

• Manufacturer Part Number: DSPIC30F2010-30I/SPG
• Description: 16BIT 30MIPS DSPIC, 30F2010, DIP28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F2010-30I/SPG

• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.0
The
enhancements to the previous PICmicro
sets, while maintaining an easy migration from
PICmicro instruction sets.
Most instructions are a single program memory word
(24-bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word divided
into an 8-bit opcode which specifies the instruction
type, and one or more operands which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 22-1 shows the general symbols used in
describing the instructions.
The dsPIC30F instruction set summary in Table 22-2
lists all the instructions along with the status flags
affected by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand, which is typically a
• The second source operand, which is typically a
• The destination of the result, which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value ’f’
• The destination, which could either be the file
Most bit oriented instructions (including simple rotate/
shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register (specified
The literal instructions that involve data movement may
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
 2004 Microchip Technology Inc.
register ’Wb’ without any address modifier
register ’Ws’ with or without an address modifier
register ’Wd’ with or without an address modifier
register ’f’ or the W0 register, which is denoted as
’WREG’
modifier) or file register (specified by the value of
’Ws’ or ’f’)
by a literal value, or indirectly by the contents of
register ’Wb’)
register (specified by the value of ’k’)
value is to be loaded (specified by ’Wb’ or ’f’)
dsPIC30F
INSTRUCTION SET SUMMARY
barrel
shift
instruction
instructions)
set
adds
®
have
Advance Information
instruction
many
three
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand, which is a register ’Wb’
• The second source operand, which is a literal
• The destination of the result (only if not the same
The MAC class of DSP instructions may use some of the
following operands:
• The accumulator (A or B) to be used (required
• The W registers to be used as the two operands
• The X and Y address space pre-fetch operations
• The X and Y address space pre-fetch destinations
• The accumulator write back destination
The other DSP instructions do not involve any
multiplication, and may include:
• The accumulator to be used (required)
• The source or destination operand (designated as
• The amount of shift, specified by a W register ’Wn’
The control instructions may use some of the following
operands:
• A program memory address
• The mode of the Table Read and Table Write
All instructions are a single word, except for certain
double-word instructions, which were made double-
word instructions so that all the required information is
available in these 48-bits. In the second word, the
8 MSb’s are 0’s. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
Most single word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all
Table Reads and Writes and RETURN/RETFIE instruc-
tions, which are single word instructions, but take two
or three cycles. Certain instructions that involve skip-
ping over the subsequent instruction, require either two
or three cycles if the skip is performed, depending on
whether the instruction being skipped is a single word
or two-word instruction. Moreover, double-word moves
require two cycles. The double-word instructions
execute in two instruction cycles.
without any address modifier
value
as the first source operand), which is typically a
register ’Wd’ with or without an address modifier
operand)
Wso or Wdo, respectively) with or without an
address modifier
or a literal value
instructions
Note:
For more details on the instruction set,
refer to the Programmer’s Reference
Manual.
dsPIC30F
DS70082E-page 163