DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 75

• Manufacturer Part Number: DSPIC30F2010-30I/SPG
• Description: 16BIT 30MIPS DSPIC, 30F2010, DIP28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F2010-30I/SPG

• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.5.1
When the TON = 1, TCS = 1 and TGATE = 0, the timer
increments on the rising edge of the 32 kHz LP oscilla-
tor output signal, up to the value specified in the period
register, and is then reset to ‘0’.
The TSYNC bit must be asserted to a logic ‘0’
(Asynchronous mode) for correct operation.
Enabling LPOSCEN (OSCCON<1>) will disable the
normal Timer and Counter modes and enable a timer
carry-out wake-up event.
When the CPU enters Sleep mode, the RTC will con-
tinue to operate, provided the 32 kHz external crystal
oscillator is active and the control bits have not been
changed. The TSIDL bit should be cleared to ‘0’ in
order for RTC to continue operation in Idle mode.
 2004 Microchip Technology Inc.
RTC OSCILLATOR OPERATION
Advance Information
9.5.2
When an interrupt event occurs, the respective inter-
rupt flag, T1IF, is asserted and an interrupt will be gen-
erated, if enabled. The T1IF bit must be cleared in
software. The respective Timer interrupt flag, T1IF, is
located in the IFS0 status register in the Interrupt
Controller.
Enabling an interrupt is accomplished via the respec-
tive timer interrupt enable bit, T1IE. The Timer interrupt
enable bit is located in the IEC0 control register in the
Interrupt Controller.
RTC INTERRUPTS
dsPIC30F
DS70082E-page 73