AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 145
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.10.19
Datasheet
DEVEN - Device Enable
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Allows for enabling/disabling of PCI devices and functions that are within the CPU
Uncore. The table below the bit definitions describes the behavior of all combinations
of transactions to devices controlled by this register.
31:15
13:5
2:1
Bit
14
4
3
0
Access
RO
RO
RO
RO
RO
RO
RO
Default Value
00000h
000h
00b
0b
1b
1b
1b
0/2/1/PCI
54-57h
00000019h
32 bits
RO;
RESERVED ():
RESERVED ()
RESERVED ():
Internal Graphics Engine Function 1 (D2F1EN):
0: Bus 0 Device 2 Function 1 is disabled and hidden
1: Bus 0 Device 2 Function 1 is enabled and visible
If Device 2 Function 0 is disabled and hidden, then
Device 2 Function 1 is also disabled and hidden
independent of the state of this bit.
If this component is not capable of Dual Independent
Display (CAPID0[40] = 1) then this bit is hardwired
to 0b to hide Device 2 Function 1.
Internal Graphics Engine Function 0 (D2F0EN):
0: Bus 0 Device 2 Function 0 is disabled and hidden
1: Bus 0 Device 2 Function 0 is enabled and visible
If this CPU Uncore does not have internal graphics
capability (CAPID0[46] = 1) then Device 2 Function
0 is disabled and hidden independent of the state of
this bit.
Reserved ():
Host Bridge (D0EN):
Bus 0 Device 0 Function 0 may not be disabled and
is therefore hardwired to 1.
Description
145
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