NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 36

• Manufacturer Part Number: NRF9E5
• Description: TRX, 430-928MHZ, MCU/ADC/PWM, SMD
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF9E5

• Receiving Current: 12.5mA
• Transmitting Current: 30mA
• Data Rate: 50Kbps
• Frequency Range: 430MHz To 928MHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 1.9V To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
11.2 SPI Instruction Set
The available commands to be used on the SPI-interface are given in Table 21.
Whenever CSN is set low the interface would expect an instruction. Every new
instruction has to be presided by a high to low transaction on CSN.
A read or a write operation may operate on a single byte or on a set of succeeding bytes
from a given start address defined by the instruction. When accessing succeeding bytes
one will read or write MSB of the byte with the smallest byte number first. The content
of the status-register will always be read to MISO after a high to low transition on CSN.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.3
Instruction Name
W_RF_CONFIG
(WRC)
R__RF_CONFIG
(RRC)
W_TX_PAYLOAD
(WTP)
R_TX_PAYLOAD
(RTP)
W_TX_ADDRESS
(WTA)
R_TX_ADDRESS
(RTA)
R_RX_PAYLOAD
(RRP)
R_ADC_DATA
(RAD)
W_ADC_CONFIG
(WAC)
R_ADC_CONFIG
(RAC)
CHANNEL_CONFIG
(CC)
START_ADC_CONV
(SAV)
STATUS REGISTER
Table 21 Instruction set for the Transceiver AD converter subsystem.
Instruction set for the Transceiver and AD converter subsystem
Instruction
Format
0000 AAAA
0001 AAAA
0010 0000
0010 0001
0010 0010
0010 0011
0010 0100
0100 000A
0100 0100
0100 0110
1000 pphc
cccc cccc
1100 ssss
N.A.
Operation
Write Configuration-register. AAAA indicates which byte
the write operation is to be started from. Number of bytes
depending on start address AAAA.
Read Configuration-register. AAAA indicates which byte
the read operation is to be started from. Number of bytes
depending on start address AAAA.
Write TX-payload: 1 – 32 bytes. A write operation will
always start at byte 0.
Read TX-payload: 1 – 32 bytes. A read operation will
always start at byte 0.
Write TX-address: 1 – 4 bytes. A write operation will
always start at byte 0.
Read TX-address: 1 – 4 bytes. A read operation will
always start at byte 0.
Read RX-payload: 1 – 32 bytes. A read operation will
always start at byte 0.
Read ADC data.
operation is to be started from.
Write ADC configuration register: 1 – 3 bytes. A write
operation will always start at byte 0. Byte 2 is reserved.
Read ADC configuration register: 1 – 3 bytes. A read
operation will always start at byte 0. Byte 2 is reserved.
Special command for fast setting of CH_NO,
HFREQ_PLL and PA_PWR in the CONFIGURATION
REGISTER. CH_NO= ccccccccc, HFREQ_PLL = h
PA_PWR = pp
Special command for start of an ADC conversion for a
given source – ssss = CHSEL.
The content of the status-register (S[7:0]) will always be
read to MISO after a high to low transition on CSN as
shown in Figure 11 and 12.
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A indicates which byte the read
June 2006