NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 46

• Manufacturer Part Number: NRF9E5
• Description: TRX, 430-928MHZ, MCU/ADC/PWM, SMD
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF9E5

• Receiving Current: 12.5mA
• Transmitting Current: 30mA
• Data Rate: 50Kbps
• Frequency Range: 430MHz To 928MHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 1.9V To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interrupt
INT0_N
INT1_N
TI or RI
TF2 or
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
15 INTERRUPTS
nRF9E5 supports the following interrupt sources:
signal
15.1 Interrupt SFRs
The following SFRs are associated with interrupt control:
- IE – SFR 0xA8 (Table 37)
- IP – SFR 0xB8 (Table 38)
- EXIF – SFR 0x91 (Table 39)
- EICON – SFR 0xD8 (Table 40)
- EIE – SFR 0xE8 (Table 41)
- EIP – SFR 0xF8 (Table 42)
The IE and IP SFRs provide interrupt enable and priority control for the standard
interrupt unit, as with industry standard 8051. The EXIF, EICON, EIE, and EIP registers
provide flags, enable control, and priority control for the extended interrupt unit.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.3
EXF2
wdti
TF0
TF1
int2
int3
int4
int5
Natural
Priority
10
11
12
1
2
3
4
5
6
8
9
Interupt
Vector
0x0B
0x1B
0x2B
0x4B
0x5B
0x03
0x13
0x23
0x43
0x53
0x63
Table 36 nRF9E5 interrupt sources.
T2CON.7
T2CON.6
EICON.3
TCON.1
TCON.5
TCON.3
TCON.7
SCON.0
SCON.1
(EXF2)
EXIF.4
EXIF.5
EXIF.6
EXIF.7
(TF2),
(RI),
Flag
(TI)
Page 46 of 108
Enable
EIE.0
EIE.1
EIE.2
EIE.3
EIE.4
IE.0
IE.1
IE.2
IE.3
IE.4
IE.5
Control
EIP.0
EIP.1
EIP.2
EIP.3
EIP.4
IP.0
IP.1
IP.2
IP.3
IP.4
IP.5
interrupt from Serial Port
External interrupt, active
External interrupt, active
Internal ADC EOC (end
Internal Wakeup (GPIO
wakeup and RTC timer)
edge-sensitive or level-
edge-sensitive or level-
Internal Radio Address
Match (AM) interrupt
sensitive, at Port P0.3
sensitive, at Port P0.4
Ready (DR) interrupt
Internal SPI READY
low, configurable as
low, configurable as
Internal Radio Data
of AD conversion)
Timer 0 interrupt
Timer 1 interrupt
Timer 2 interrupt
Receive/transmit
Description
interrupt
interrupt
interrupt
June 2006