NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 80

TRX, 430-928MHZ, MCU/ADC/PWM, SMD

NRF9E5

Manufacturer Part Number
NRF9E5
Description
TRX, 430-928MHZ, MCU/ADC/PWM, SMD
Manufacturer
NORDIC SEMICONDUCTOR
Datasheet

Specifications of NRF9E5

Receiving Current
12.5mA
Transmitting Current
30mA
Data Rate
50Kbps
Frequency Range
430MHz To 928MHz
Modulation Type
GFSK
Rf Ic Case Style
QFN
No. Of Pins
32
Supply Voltage Range
1.9V To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
all three timers is 0; that is, twelve-clock intervals. These bits have no effect in counter
mode.
default initial data value is 0x01, i.e. MOVX takes 3 cycles.
18.8.3 Timer 2
Timer 2 runs only in 16-bit mode and offers several capabilities not available with
Timers 0 and 1. The modes available with Timer 2 are:
The SFRs associated with Timer 2 are:
for capture mode, or as the LSB of the 16-bit reload value when Timer 2 is configured
for auto-reload mode.
for capture mode, or as the MSB of the 16-bit reload value when Timer 2 is configured
for auto-reload mode.
TL2 – SFR 0xCC – Lower eight bits of the 16-bit count.
TH2 – SFR 0xCD – Upper eight bits of the 16-bit count.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.3
- 16-bit timer/counter
- 16-bit timer with capture
- 16-bit auto-reload timer/counter
- Baud-rate generator
- T2CON – SFR 0xC8; refer to Table 68 T2CON Register – SFR 0x
- RCAP2L – SFR 0xCA – Used to capture the TL2 value when Timer 2 is configured
- RCAP2H – SFR 0xCB – Used to capture the TH2 value when Timer 2 is configured
Bit
CKCON.7,6
CKCON.5
CKCON.4
CKCON.3
CKCON.2–
0
compatibility with 80C32); when T2M = 1, Timer 2 uses CPU_clk/4. This bit has
no effect when Timer 2 is configured for baud rate generation.
compatibility with 80C32); when T1M = 1, Timer 1 uses CPU_clk/4.
compatibility with 80C32); when T0M = 1, Timer 0 uses CPU_clk/4.
instructions; number of cycles is 2 + { MD2, MD1, MD0}
Function
Reserved
T2M – Timer 2 clock select. When T2M = 0, Timer 2 uses CPU_clk/12 (for
MD2, MD1, MD0 – Control the number of cycles to be used for external MOVX
T1M – Timer 1 clock select. When T1M = 0, Timer 1 uses CPU_clk/12 (for
T0M – Timer 0 clock select. When T0M = 0, Timer 0 uses CPU_clk/12 (for
Table 67 CKCON Register – SFR 0x8E.
Page 80 of 108
June 2006

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