HEF4052BP NXP Semiconductors, HEF4052BP Datasheet

IC, ANALOG MUX/DMUX, 4 X 1, DIP-16

HEF4052BP

Manufacturer Part Number
HEF4052BP
Description
IC, ANALOG MUX/DMUX, 4 X 1, DIP-16
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4052BP

No. Of Circuits
2
Supply Current
600µA
On State Resistance Max
60ohm
Supply Voltage Range
3V To 15V
Operating Temperature Range
-40°C To +125°C
Analog Switch Case Style
DIP
No. Of Pins
16
Dc
03+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HEF4052BP
Manufacturer:
PHI
Quantity:
1 000
Part Number:
HEF4052BP,652
Manufacturer:
NXP USA Inc.
Quantity:
198
1. General description
2. Features and benefits
3. Applications
The HEF4052B is a dual 4-channel analog multiplexer/demultiplexer with common
channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs
(nY0 to nY3) and a common input/output (nZ). The common channel select logic includes
two select inputs (S1 and S2) and an active LOW enable input (E). Both
multiplexers/demultiplexers contain four bidirectional analog switches, each with one side
connected to an independent input/output (nY0 to nY3) and the other side connected to a
common input/output (nZ). With E LOW, one of the four switches is selected
(low-impedance ON-state) by S1 and S2. With E HIGH, all switches are in the
high-impedance OFF-state, independent of S1 and S2. If break before make is needed,
then it is necessary to use the enable input.
V
and E). The V
nZ) can swing between V
not exceed 15 V. Unused inputs must be connected to V
operation as a digital multiplexer/demultiplexer, V
ground). V
The HEF4052B is suitable for use over both the industrial (−40 °C to +85 °C) and
automotive (−40 °C to +125 °C) temperature ranges.
DD
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Rev. 07 — 26 March 2010
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range −40 °C to +125 °C
Complies with JEDEC standard JESD 13-B
Industrial and automotive
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
and V
SS
EE
are the supply voltage connections for the digital control inputs (S1 and S2,
and V
DD
to V
SS
SS
are the supply voltage connections for the switches.
range is 3 V to 15 V. The analog inputs/outputs (nY0 to nY3, and
DD
as a positive limit and V
EE
EE
is connected to V
as a negative limit. V
DD
, V
SS
, or another input. For
Product data sheet
SS
(typically
DD
− V
EE
may

HEF4052BP Summary of contents

Page 1

HEF4052B Dual 4-channel analog multiplexer/demultiplexer Rev. 07 — 26 March 2010 1. General description The HEF4052B is a dual 4-channel analog multiplexer/demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output ...

Page 2

... NXP Semiconductors 4. Ordering information Table 1. Ordering information − ° All types operate from +125 Type number Package Name HEF4052BP DIP16 HEF4052BT SO16 HEF4052BTT TSSOP16 5. Functional diagram Fig 1. Functional diagram HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer ° C. Description plastic dual in-line package; 16 leads (300 mil) plastic small outline package ...

Page 3

... NXP Semiconductors Fig 2. Schematic diagram (one switch Fig 3. Logic symbol HEF4052B_7 Product data sheet 1Y0 12 1Y1 14 1Y2 15 1Y3 11 2Y0 1 2Y1 5 2Y2 2 2Y3 4 001aak605 Fig 4. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 07 — 26 March 2010 HEF4052B Dual 4-channel analog multiplexer/demultiplexer ...

Page 4

... NXP Semiconductors LEVEL S1 CONVERTER LEVEL S2 CONVERTER LEVEL E CONVERTER Fig 5. Logic diagram HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer All information provided in this document is subject to legal disclaimers. Rev. 07 — 26 March 2010 HEF4052B 1Z 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 2Z 001aak634 © ...

Page 5

... NXP Semiconductors 6. Pinning information 6.1 Pinning HEF4052B 2Y0 1 2Y2 2Y3 2Y1 001aag215 Fig 6. Pin configuration SOT38-4 and SOT109-1 6.2 Pin description Table 2. Pin description Symbol S1, S2 1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15 HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer ...

Page 6

... NXP Semiconductors 7. Functional description 7.1 Function table [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage ...

Page 7

... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage I T ambient temperature amb Δt/ΔV input transition rise and fall rate Fig 8. Operating area as a function of the supply voltages 10. Static characteristics Table 6. Static characteristics ...

Page 8

... NXP Semiconductors Table 6. Static characteristics Symbol Parameter Conditions I OFF-state Z port; S(OFF) leakage all channels OFF; current see Figure 9 Y port; per channel; see Figure 10 I supply current input Sn, E inputs I capacitance 10.1 Test circuits Fig 9. Test circuit for measuring OFF-state leakage current Z port Fig 10 ...

Page 9

... NXP Semiconductors 10.2 On resistance Table 7. ON resistance ° μ 200 amb SW SS Symbol Parameter R ON resistance (peak) ON(peak resistance (rail) ON(rail) ΔR ON resistance mismatch ON between channels 10.2.1 On resistance waveform and test circuit Fig 11. Test circuit for measuring R HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer = 0 V ...

Page 10

... NXP Semiconductors Fig 12. Typical function of input voltage ON 11. Dynamic characteristics Table 8. Dynamic characteristics ° for test circuit see amb SS EE Symbol Parameter t HIGH to LOW propagation delay nYn nZ, nYn; see PHL t LOW to HIGH propagation delay Yn nZ, nYn; see PLH t HIGH to OFF-state PHZ ...

Page 11

... NXP Semiconductors Table 8. Dynamic characteristics ° for test circuit see amb SS EE Symbol Parameter t OFF-state to LOW PZL propagation delay 11.1 Waveforms and test circuit V DD nYn input PLH nYn V M output V EE Measurement points are given in Fig 13. nYn nZ, nYn propagation delays ...

Page 12

... NXP Semiconductors Test data is given in Table Definitions: DUT = Device Under Test Termination resistance should be equal to output impedance Load capacitance including test jig and probe Load resistance. L Fig 16. Test circuit for measuring switching times Table 10. Test data Input nYn and ≤ [1] For nYn to nZ propagation delays use V ...

Page 13

... NXP Semiconductors 11.2 Additional dynamic parameters Table 11. Additional dynamic characteristics ° amb Symbol Parameter THD total harmonic distortion −3 dB frequency response f (−3dB) α isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk [ biased Table 12. Dynamic power dissipation P P can be calculated from the formulas shown; V ...

Page 14

... NXP Semiconductors Fig 19. Test circuit for measuring isolation (OFF-state) a. Test circuit b. Input and output pulse definitions Fig 20. Test circuit for measuring crosstalk voltage between digital inputs and switch HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer and S2 nY0 nYn 0. and S2 nY0 ...

Page 15

... NXP Semiconductors and S2 nY0 nYn Switch closed condition Fig 21. Test circuit for measuring crosstalk between switches HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer 001aak659 All information provided in this document is subject to legal disclaimers. Rev. 07 — 26 March 2010 HEF4052B and S2 nY0 nYn ...

Page 16

... NXP Semiconductors 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 17

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 18

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 19

... NXP Semiconductors 13. Revision history Table 13. Revision history Document ID Release date HEF4052B_7 20100326 HEF4052B_6 20100308 • Modifications: Table 6 “Static HEF4052B_5 20091127 HEF4052B_4 20090924 HEF4052B_CNV_3 19950101 HEF4052B_CNV_2 19950101 HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer Data sheet status Product data sheet Product data sheet characteristics” ...

Page 20

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 21

... NXP Semiconductors 15. Contact information For more information, please visit: For sales office addresses, please send an email to: HEF4052B_7 Product data sheet Dual 4-channel analog multiplexer/demultiplexer http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 07 — 26 March 2010 HEF4052B © NXP B.V. 2010. All rights reserved. ...

Page 22

... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 Limiting values Recommended operating conditions Static characteristics 10.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 10 ...

Related keywords