P89LPC938FDH NXP Semiconductors, P89LPC938FDH Datasheet - Page 20

• Manufacturer Part Number: P89LPC938FDH
• Description: MCU 8BIT 80C51 8K FLASH, TSSOP28
• Manufacturer: NXP Semiconductors

Specifications of P89LPC938FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 26
• Program Memory Size: 8KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 18MHz
• Oscillator Type: External,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
9397 750 14051
Product data sheet
7.4 On-chip RC oscillator option
7.5 Watchdog oscillator option
7.6 External clock input option
The frequency of this clock output is
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
The P89LPC938 has a 6-bit TRIM register that can be used to tune the frequency of the
RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed
value to adjust the oscillator frequency to 7.373 MHz,
End-user applications can write to the TRIM register to adjust the on-chip RC oscillator to
other frequencies.
The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator
can be used to save power when a high clock frequency is not needed.
In this configuration, the processor clock is derived from an external source driving the
XTAL1/P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2/P3.0 pin may be
used as a standard port pin or a clock output. When using an oscillator frequency
above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit
is required to hold the device in reset at power-up until V
specified level. When system power is removed V
specified operating voltage. When using an oscillator frequency above 12 MHz, in
some applications, an external brownout detect circuit may be required to hold the
device in reset when V
Fig 6. Block diagram of oscillator control.
XTAL1
XTAL2
(400 kHz 30 % 20 %)
(7.3728 MHz 1 %)
OSCILLATOR
OSCILLATOR
WATCHDOG
RC
MEDIUM FREQUENCY
HIGH FREQUENCY
LOW FREQUENCY
TIMER 0 AND
RCCLK
Rev. 01 — 25 February 2005
TIMER 1
DD
falls below the minimum specified operating voltage.
I
2
1
C-BUS
2
that of the CCLK. If the clock output is not needed
OSCCLK
8-bit microcontroller with 10-bit A/D converter
PCLK
DIVM
SPI
DD
CCLK
1 % at room temperature.
PCLK
will fall below the minimum
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
UART
DD
has reached its
P89LPC938
ADC0
WDT
CPU
RTC
32
CCU
PLL
002aab102
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