P89V51RC2FN NXP Semiconductors, P89V51RC2FN Datasheet - Page 27

IC, MCU 8BIT 80C51 32K FLASH, DIP40

P89V51RC2FN

Manufacturer Part Number
P89V51RC2FN
Description
IC, MCU 8BIT 80C51 32K FLASH, DIP40
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89V51RC2FN

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
32
Program Memory Size
32KB
Ram Memory Size
1KB
Cpu Speed
33MHz
Oscillator Type
External Only
No. Of Timers
4
No. Of Pwm
RoHS Compliant
Package
40PDIP
Device Core
80C51
Family Name
89V
Maximum Speed
40 MHz
Ram Size
1 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
32
Interface Type
SPI/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
6.4 Timers/counters 0 and 1
Table 13.
The two 16-bit Timer/counter registers: Timer 0 and Timer 1 can be configured to operate
either as timers or event counters (see
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one can
think of it as counting machine cycles. Since a machine cycle consists of six oscillator
periods, the count rate is
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 or T1. In this function, the external input is sampled
once every machine cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is
incremented. The new count value appears in the register in the machine cycle following
the one in which the transition was detected. Since it takes two machine cycles (12
oscillator periods) for 1-to-0 transition to be recognized, the maximum count rate is
the oscillator frequency. There are no restrictions on the duty cycle of the external input
signal, but to ensure that a given level is sampled at least once before it changes, it should
be held for at least one full machine cycle. In addition to the ‘Timer’ or ‘Counter’ selection,
Timer 0 and Timer 1 have four operating modes from which to select.
The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the Special Function
Register TMOD. These two Timer/counters have four operating modes, which are
selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both
Timers/counters. Mode 3 is different. The four operating modes are described in the
following text.
IAP function
Program Security Bit, Double
Clock
Read Security Bit, Double Clock,
SoftICE
Erase sector
IAP function calls
Rev. 05 — 12 November 2009
1
6
of the oscillator frequency.
…continued
IAP call parameters
Input parameters:
R1 = 05H
DPL = 01H = security bit
DPL = 05H = Double Clock
Return parameter(s):
ACC = 00 = pass
ACC = !00 = fail
Input parameters:
ACC = 07H
Return parameter(s):
ACC = 00 SoftICE S/N-match 0 SB 0 DBL_CLK
Input parameters:
R1 = 08H
DPH = sector address high byte
DPL = sector address low byte
Return parameter(s):
ACC = 00 = pass
ACC = !00 = fail
Table 14
P89V51RB2/RC2/RD2
and
8-bit microcontrollers with 80C51 core
Table
15).
© NXP B.V. 2009. All rights reserved.
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