STA333W STMicroelectronics, STA333W Datasheet - Page 22

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STA333W

Manufacturer Part Number
STA333W
Description
DIG AUDIO SYSTEM, 2-CH, 36POWERSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA333W

Svhc
No SVHC (15-Dec-2010)
Package / Case
PowerSSO
Interface
I2S
No. Of Pins
36
Operating Temperature Range
0°C To +70°C
Supply Voltage Max
18V
Supply Voltage Min
4.5V
Termination T
RoHS Compliant
Interface Type
I2S
Rohs Compliant
Yes

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Register description
6.1
6.1.1
22/49
Configuration registers (addr 0x00 to 0x05)
Configuration register A (addr 0x00)
Master clock select
Table 9.
The STA333W supports sample rates of 32 kHz, 44.1 kHz, 48 KHz, 88.2 kHz, 96 kHz,
176.4 kHz, and 192 kHz. Therefore the internal clock is:
The external clock frequency provided to the XTI pin must be a multiple of the input sample
frequency (f
The relationship between the input clock and the input sample rate is determined by both
the MCSx and the IR (input rate) register bits. The MCSx bits determine the PLL factor
generating the internal clock and the IR bit determines the oversampling ratio used
internally.
Table 10.
0
1
2
32, 44.1, 48
88.2, 96
176.4, 192
Bit
FDRB
D7
Input sample rate
32.768 MHz for 32 kHz
45.1584 MHz for 44.1 kHz, 88.2 kHz, and 176.4 kHz
49.152 MHz for 48 kHz, 96 kHz, and 192 kHz
0
R/W
R/W
R/W
f
S
R/W
(kHz)
S
Master clock select
MCS bits
).
TWAB
D6
1
1
1
0
RST
TWRB
00
01
1X
MCS0
MCS1
MCS2
D5
1
IR
Doc ID 13365 Rev 2
Name
576 * f
NA
NA
101
IR1
D4
0
S
128 * f
64 * f
32 * f
Master clock select: Selects the ratio between the
input I
100
S
S
IR0
D3
S
0
2
S sample frequency and the input clock.
256 * f
128 * f
64 * f
011
MCS[2:0]
S
MCS2
S
S
D2
0
Description
384 * f
192 * f
96 * f
010
S
S
S
MCS1
D1
512 * f
256 * f
128 * f
1
001
S
S
S
STA333W
768 * f
384 * f
192 * f
MCS0
D0
000
1
S
S
S

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