CDB4364 Cirrus Logic Inc, CDB4364 Datasheet - Page 23

• Manufacturer Part Number: CDB4364
• Description: Eval Bd 6Chn DAC W/DSD Spt&Lw-Ltnc DF
• Manufacturer: Cirrus Logic Inc

Specifications of CDB4364

• Number Of Dac's: 6
• Number Of Bits: 24
• Outputs And Type: 6, Single Ended
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Dac Type: Voltage
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS4364
• Description/function: Audio D/A
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS4364
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant

DS619F1
4.3.1
4.3.2
4.4
SDINx
LRCK
SCLK
SDIN1
LRCK
SCLK
LRCK
SCLK
SDIN1
1 0
Oversampling Modes
The CS4364 operates in one of three oversampling modes based on the input sample rate. Mode selection
is determined by the M4, M3 and M2 pins in Hardware Mode or the FM bits in Software Mode. Single-Speed
Mode supports input sample rates up to 50 kHz and uses a 128x oversampling ratio. Double-Speed Mode
supports input sample rates up to 100 kHz and uses an oversampling ratio of 64x. Quad-Speed Mode sup-
ports input sample rates up to 200 kHz and uses an oversampling ratio of 32x.
The auto speed-mode detect feature allows for the automatic selection of speed mode based off of the in-
coming sample rate. This allows the CS4364 to accept a wide range of sample rates with no external inter-
vention necessary. The auto speed-mode detect feature is available in both Hardware and Software Mode.
OLM #1
OLM #1 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 128 Fs. Six channels of MSB first 20-bit PCM data are input on SDIN1.
OLM #2
OLM #2 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave to
SCLK at 256 Fs. Six channels of MSB first 24-bit PCM data are input on SDIN1.
MSB
MSB
DAC_A1
DAC_A1
20 clks
24 clks
17 16
LSB
LSB
15 14 13 12 11 10
MSB
MSB
DAC_A2
DAC_A2
Left Channel
Left Channel
20 clks
Left Channel
24 clks
32 clocks
64 clks
128 clks
Figure 13. Format 5 - Right-Justified 18-bit Data
LSB
LSB
Figure 15. Format 9 - One Line Mode 2
Figure 14. Format 8 - One Line Mode 1
9 8 7
MSB
MSB
DAC_A3
20 clks
DAC_A3
24 clks
6 5 4 3 2 1 0
LSB
LSB
MSB
MSB
DAC_B1
20 clks
DAC_B1
24 clks
17 16
LSB
LSB
15 14 13 12 11 10
MSB
MSB
Right Channel
DAC_B2
20 clks
DAC_B2
Right Channel
24 clks
64 clks
128 clks
Right Channel
LSB
LSB
MSB
9 8 7
MSB
DAC_B3
20 clks
DAC_B3
24 clks
6 5 4 3 2 1 0
LSB
LSB
CS4364
MSB
MSB
23