CDB4364 Cirrus Logic Inc, CDB4364 Datasheet - Page 26

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CDB4364

Manufacturer Part Number
CDB4364
Description
Eval Bd 6Chn DAC W/DSD Spt&Lw-Ltnc DF
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB4364

Number Of Dac's
6
Number Of Bits
24
Outputs And Type
6, Single Ended
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS4364
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS4364
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
26
4.9
4.9.1
4.10
(64Fs)
BCKA
DSD Normal Mode
Grounding and Power Supply Arrangements
As with any high resolution converter, the CS4364 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between digital ground and analog ground, the GND pins of the CS4364 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
Analog Output and Filtering
The CS4364 does not include phase or amplitude compensation for an external filter. Therefore, the DAC
system phase and amplitude response will be dependent on the external analog circuitry.
Figure 19
Figure 20
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Note:
The CDB4364 evaluation board demonstrates the optimum layout and power supply arrangements.
DSD_SCLK
Not Used
Not Used
DSDAx,
DSDBx
shows how the full-scale analog output level specification is derived.
shows how the recommended output filtering with location for optional mute circuit.
All decoupling capacitors should be referenced to analog ground.
D0
D0
Figure 18. DSD Phase Modulation Mode Diagram
D1
D1
D1
D2
D2
DSDAx,
DSD_SCLK
DSD_SCLK
DSDBx
Not Used
Modulation Mode
DSD Phase
CS4364
(64Fs)
BCKD
(128Fs)
BCKA
DS619F1

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