CS44800-CQZ Cirrus Logic Inc, CS44800-CQZ Datasheet - Page 44

• Manufacturer Part Number: CS44800-CQZ
• Description: IC,Audio Power Amplifier Controller,CMOS,QFP,64PIN
• Manufacturer: Cirrus Logic Inc
• Type: Digital Amplifier Controllerr

Specifications of CS44800-CQZ

• Applications: Automotive Systems
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1532 - BOARD EVAL FOR CS44800 PWM CTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1070

5.1.4
Recommended Power-Down Sequence
1. Mute all channel outputs by setting the corresponding CHxx_MUTE bits to ‘1’b.
2. When driving a single-ended (half-bridged) power output stage, set the RAMP[1:0] bits to ‘01’b and the required ramp speed, to initiate
3. Power down each channel’s PWM modulator by setting the PDN_PWMxx bit to ‘1’b. If single-ended, this will initiate a sequence which
4. The ramp-down function can be configured to cause an interrupt condition when the ramp period has completed. This will be indicated
5. Once the ramp-down sequence has completed, set the appropriate GPIO pin, or other control signal, to power down the power output
6. For full-bridged power output stage configurations, the ramp-down sequence is not required. Powering down the power output stage
7. Concurrently with the ramp-down sequence, if desired, stop all clocks on the DAI interface (DAI_MCLK, DAI_SCLK, DAI_LRCK).
a ramp cycle when the channel is powered down.
will slowly decrease the DC voltage, from Vpower÷2 to 0 V, across the AC-coupling capacitor.
by an active INT signal.
stage.
will not cause an audible pop from the speaker.
Done
Y
Read DEC_OUTD[23:0]
Set PSR_RESET = 1b
Figure 30. PSR Calibration Sequence
DEC_OUTD[23:0] <
Set PSR_EN = 1b
Set PSR_EN = 0b
C
PSR
3FEF90h <
400FFFh?
=C
PSR
- 9Bh
Y
N
DEC_OUTD[23:0] >
400FFFh?
N
C
PSR
=C
PSR
+ 9Bh